I've subsequently discovered that USB debugging requires EHCI, and sadly
lspci yields no such debug capabilities. Presumably this means either I
figure out what's wrong 'blind', or start soldering a servo port?
On Tue, 23 Feb 2016 at 23:30, Marcos Scriven wrote:
>
> --
Hi Daoud
This might be a good start:
https://docs.google.com/presentation/d/1eGPMu03vCxIO0a3oNX8Hmij_Qwwz6R6ViFC_1HlHOYQ/edit#slide=id.gf3c00a91_071
Marcos
On Tue, Feb 23, 2016 at 1:17 PM, daoud yessine
wrote:
> Hello
>
> I am searching a document describing the boot process of coreboot with
>
PM, Marcos Scriven wrote:
> Hi all
>
> I've built a ROM for swanky which just results in a brick, and wondering
> if anyone else has had success with this (or any Bay Trail Chromebook), or
> could otherwise provide guidance please.
>
> I've been able to reprogram t
Hi all
I've built a ROM for swanky which just results in a brick, and wondering if
anyone else has had success with this (or any Bay Trail Chromebook), or
could otherwise provide guidance please.
I've been able to reprogram the ROM directly, and am working with a patched
boot stub region for now.
x27;m not a Google dev, just a hobbyist, but I've spent a lot of time over
> the past year working with coreboot for the Haswell ChromeOS devices
> (mostly the ChromeBoxes) and can offer some answers, inline below.
>
> On 5/8/2015 2:38 PM, Marcos Scriven wrote:
>
> I have a
I have a Dell Chromebook 11 (Google codename 'Wolf') which I'd like to
install a custom coreboot ROM on. Although John Lewis provides ROMs here
https://johnlewis.ie/custom-chromebook-firmware/rom-download/, I'd rather
not use them for a few reasons:
1) It's replacing one 'closed' ROM with another,
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