Hi Joseph and Peter,
Thanks for commiting my patch.
Now i can dig up the next patch.
Thanks,Nils.
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On 07/21/2010 05:20 PM, Nils wrote:
This patch converts the Geode GX2 boards to CAR.
It reduces the boot time with ~35 seconds in Stage: loading
fallback/coreboot_ram.
After the conversion GCC gave a lot of build warnings in the old ROMCC code
(especially in the southbridge CS5535 code used by
Op zaterdag 17 juli 2010 01:00:15 schreef u:
P.s. How is your paraflasher project doing? Do you have some programming
results already?
No programming yet; still working on hardware design, I decided to make
my own pcb's for it, something I have wanted to do for a long time. I
have
Nils wrote:
Ps:I hear that nowadays you can order PCB`s real cheap in china.
But i didn`t use it for my simple designs yet as i found the
shipping cost for 1 PCB to high.
There is certainly a market for small quantity PCBs. Competition has
driven cost down. If you can wait for long(ish)
On Tue, 6 Jul 2010 20:27:12 +0200, Nils njaco...@hetnet.nl wrote:
Ping!?
Could anybody tell me how to proceed?
Peter:did i gave the wrong answers? :)
Thanks,Nils.
Nils,
I really would hate to see your great work go to the way side.
It has been a few revisions since your original patch.
Hi Joseph,
Op vrijdag 16 juli 2010 14:41:47 schreef u:
On Tue, 6 Jul 2010 20:27:12 +0200, Nils njaco...@hetnet.nl wrote:
Ping!?
Could anybody tell me how to proceed?
Peter:did i gave the wrong answers? :)
Thanks,Nils.
Nils,
I really would hate to see your great work go to the way
On 07/16/2010 03:35 PM, Nils wrote:
Hi Joseph,
Op vrijdag 16 juli 2010 14:41:47 schreef u:
On Tue, 6 Jul 2010 20:27:12 +0200, Nilsnjaco...@hetnet.nl wrote:
Ping!?
Could anybody tell me how to proceed?
Peter:did i gave the wrong answers? :)
Thanks,Nils.
Nils,
I really would hate to see
Ping!?
Could anybody tell me how to proceed?
Peter:did i gave the wrong answers? :)
Thanks,Nils.
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http://www.coreboot.org/mailman/listinfo/coreboot
Hi All,
Nils wrote:
Peter wrote:
Nils wrote:
+++ src/cpu/amd/model_gx2/cache_as_ram.inc(revision 0)
..
+ post_code(0xc5)
+DCacheSetupBad:
+ hlt /* issues */
+ jmp DCacheSetupBad
Should this maybe fail more loudly than a POST code, which can be
disbled completely.
On Tue, Jun 29, 2010 at 2:23 PM, Nils njaco...@hetnet.nl wrote:
Hi All,
Nils wrote:
Peter wrote:
Nils wrote:
+++ src/cpu/amd/model_gx2/cache_as_ram.inc (revision 0)
..
+ post_code(0xc5)
+DCacheSetupBad:
+ hlt /* issues */
+ jmp DCacheSetupBad
Should this maybe
Op dinsdag 29 juni 2010 22:40:18 schreef u:
..
I spent some time trying to get a debug message printed here but i am
probably to stupid.
I tried with printk and print_debug but the assembler complained.
Could someone perhaps point me to an example in another assembler file?
I could not
Hi Peter,
Thanks for the super fast review!
You wrote:
+++ src/southbridge/amd/cs5535/cs5535_early_setup.c (working copy)
..
+static void cs5535_setup_iobase(void)
{
msr_t msr;
+ /* setup LBAR for SMBus controller */
+ msr.hi = 0xf001;
+ msr.lo = SMBUS_IO_BASE;
+
On 06/27/2010 06:06 PM, Nils wrote:
This patch converts the Geode GX2 boards to CAR.
It reduces the boot time with ~35 seconds in Stage: loading
fallback/coreboot_ram.
After the conversion GCC gave a lot of build warnings in the old ROMCC code
(especially in the southbridge CS5535 code used by
Nils wrote:
This patch converts the Geode GX2 boards to CAR.
Thanks! Looks good!
Signed-off-by: Nils Jacobs njaco...@hetnet.nl
+++ src/southbridge/amd/cs5535/cs5535_early_setup.c (working copy)
..
+static void cs5535_setup_iobase(void)
{
msr_t msr;
+ /* setup LBAR for
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