Magnus Christensson wrote:
>> How are you using coreboot+SeaBIOS? Are you using the QEMU coreboot
>> target? Maybe that isn't good enough for Simics?
>
> I'm using naked SeaBIOS.
Ah, ok. That makes sense. Thanks!
//Peter
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Peter Stuge wrote:
Magnus Christensson wrote:
I'm not sure how work is divided between Coreboot and Seabios. Does
Coreboot do all the machine specific initialization?
This is the idea.
Ok.
Then the LINT LVTs should already have been initialized.
How are you using coreboot+
Kevin O'Connor wrote:
Hi Magnus,
Is:
for (i = 0, actual_cpu_count = 0; i < MaxCountCPUs; i++) {
int log_cpus = (ebx >> 16) & 0xff;
log_cpus = 1UL << fls(log_cpus - 1); /* round up to power of 2 */
if ((cpuid_features & (1 << 28)) && (i & (log_cpus - 1)) != 0)
Hi Magnus,
Is:
for (i = 0, actual_cpu_count = 0; i < MaxCountCPUs; i++) {
int log_cpus = (ebx >> 16) & 0xff;
log_cpus = 1UL << fls(log_cpus - 1); /* round up to power of 2 */
if ((cpuid_features & (1 << 28)) && (i & (log_cpus - 1)) != 0)
continue;
equivale
On Tue, Nov 10, 2009 at 09:30:47AM +0100, Magnus Christensson wrote:
> I'm not sure how work is divided between Coreboot and Seabios. Does
> Coreboot do all the machine specific initialization? Then the LINT LVTs
> should already have been initialized.
Yes. Coreboot is tasked with initializin
Magnus Christensson wrote:
> I'm not sure how work is divided between Coreboot and Seabios. Does
> Coreboot do all the machine specific initialization?
This is the idea.
> Then the LINT LVTs should already have been initialized.
How are you using coreboot+SeaBIOS? Are you using the QEMU coreboo
On 11/10/2009 01:44 AM, Kevin O'Connor wrote:
On Thu, Nov 05, 2009 at 03:00:45PM +0100, Magnus Christensson wrote:
Ok. Changed patches attached.
Thanks Magnus. I've committed patches 1-3 and 6. I have a question
on patch 4:
@@ -91,6 +93,12 @@ smp_probe(void)
u32 val = re
On Mon, Nov 09, 2009 at 07:44:20PM -0500, Kevin O'Connor wrote:
> That is, instead of defining a compile time parameter, I wonder if the
> default should be to msleep and only use the cmos method when qemu is
> detected - the cmos thing is really qemu specific anyway. Gleb - do
> you know a good w
On Thu, Nov 05, 2009 at 03:00:45PM +0100, Magnus Christensson wrote:
> Ok. Changed patches attached.
Thanks Magnus. I've committed patches 1-3 and 6. I have a question
on patch 4:
> @@ -91,6 +93,12 @@ smp_probe(void)
> u32 val = readl(APIC_SVR);
> writel(APIC_SVR, val | APIC_ENABLED);
On Thu, Nov 05, 2009 at 03:00:45PM +0100, Magnus Christensson wrote:
> Ok. Changed patches attached.
Looks good to me.
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Gleb.
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On Tue, Nov 03, 2009 at 10:30:12PM -0500, Kevin O'Connor wrote:
> On Tue, Nov 03, 2009 at 04:31:32PM +0100, Magnus Christensson wrote:
> > I'm attaching patches for seabios to make it work on the Virtutech
> > Simics x86-440bx model. Please let me know if there is some other list
> > that is pr
On Tue, Nov 03, 2009 at 04:31:32PM +0100, Magnus Christensson wrote:
> I'm attaching patches for seabios to make it work on the Virtutech
> Simics x86-440bx model. Please let me know if there is some other list
> that is preferred for seabios patches.
>
> Patches 1-6 and 9 are not really relate
I'm attaching patches for seabios to make it work on the Virtutech
Simics x86-440bx model. Please let me know if there is some other list
that is preferred for seabios patches.
Patches 1-6 and 9 are not really related to the Virtutech model at all,
so those would be prime candidates to be incl
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