On Sat, Oct 11, 2008 at 5:37 PM, ron minnich [EMAIL PROTECTED] wrote:
On Fri, Oct 10, 2008 at 10:18 PM, Peter Stuge [EMAIL PROTECTED] wrote:
XIP could never perform better than fetching from cache except if the
cache is broken.
If cache is broken, CAR is not going to work very well, we have
On 11.10.2008 22:32, ron minnich wrote:
On Sat, Oct 11, 2008 at 1:24 PM, Vincent Legoll
[EMAIL PROTECTED] wrote:
Would using a small bit of XIP code enable us to detect broken cache
and report that fact (post code, beep code, serial console printk)
if somebody wants to put it in early
On Sun, Oct 12, 2008 at 8:44 AM, Carl-Daniel Hailfinger
[EMAIL PROTECTED] wrote:
On 11.10.2008 22:32, ron minnich wrote:
On Sat, Oct 11, 2008 at 1:24 PM, Vincent Legoll
[EMAIL PROTECTED] wrote:
Would using a small bit of XIP code enable us to detect broken cache
and report that fact
On Sun, Oct 12, 2008 at 10:24 AM, Corey Osgood [EMAIL PROTECTED] wrote:
Hmm, I'm having some problems with garbage on the serial console, and my
serial init code seems to be in line with both the datasheet and v2, so I'm
probably screwing something up. I'm using 0xffef for the CAR base,
On Sun, Oct 12, 2008 at 10:26 AM, ron minnich [EMAIL PROTECTED] wrote:
On Sun, Oct 12, 2008 at 10:24 AM, Corey Osgood [EMAIL PROTECTED] wrote:
Hmm, I'm having some problems with garbage on the serial console, and my
serial init code seems to be in line with both the datasheet and v2, so I'm
On Sun, Oct 12, 2008 at 1:26 PM, ron minnich [EMAIL PROTECTED] wrote:
On Sun, Oct 12, 2008 at 10:24 AM, Corey Osgood [EMAIL PROTECTED]
wrote:
Hmm, I'm having some problems with garbage on the serial console, and my
serial init code seems to be in line with both the datasheet and v2, so
On Sun, Oct 12, 2008 at 11:04 AM, Corey Osgood [EMAIL PROTECTED] wrote:
I'm attaching a minicom log file. From the looks of things, it also looks
like I'm losing all output from stage0/1. The reason it boots twice is a
GPIO that automatically resets the system if it isn't disabled, and it's
Corey Osgood wrote:
I'm attaching a minicom log file.
Looks like bad baud rate.
From the looks of things, it also looks like I'm losing all output
from stage0/1.
Remember the VIA UART baud rate problem on EPIA ?
//Peter
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On 12.10.2008 19:27, ron minnich wrote:
On Sun, Oct 12, 2008 at 10:26 AM, ron minnich [EMAIL PROTECTED] wrote:
On Sun, Oct 12, 2008 at 10:24 AM, Corey Osgood [EMAIL PROTECTED] wrote:
Hmm, I'm having some problems with garbage on the serial console, and my
serial init code seems to
On 12.10.2008 20:04, Corey Osgood wrote:
I'm attaching a minicom log file. From the looks of things, it also looks
like I'm losing all output from stage0/1.
AFAICS you're not losing any output from after serial init. Things look
as I expect them to look. stage0 has no output and stage1 is
On Fri, Oct 10, 2008 at 10:18 PM, Peter Stuge [EMAIL PROTECTED] wrote:
XIP could never perform better than fetching from cache except if the
cache is broken.
If cache is broken, CAR is not going to work very well, we have no
stack -- we're not going to boot anyway ...
I think we let the guys
Add support for Cache-as-RAM on VIA C7 processors in v3.
Finally.
Thanks to Jason Zhao we got a skeleton CAR code for VIA C7 based on
older v2 code.
I cleaned it up, modified the v3 stage0 code in lots of places as
preparation for this and believe this is mostly merge-ready.
Thanks to Bari Ari
Acked-by: Ronald G. Minnich [EMAIL PROTECTED]
Note that it still won't build if CONFIG_XIP_ROM_{SIZE,BASE} are set
but I still don't know why we even have CONFIG_XIP in v3 :-)
We can fix this but I'd like to start getting via bits into v3 asap.
ron
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On Fri, Oct 10, 2008 at 8:14 PM, Carl-Daniel Hailfinger
[EMAIL PROTECTED] wrote:
On 11.10.2008 01:03, ron minnich wrote:
Acked-by: Ronald G. Minnich [EMAIL PROTECTED]
Thanks, committed in r915.
Note that it still won't build if CONFIG_XIP_ROM_{SIZE,BASE} are set
but I still don't
On Fri, Oct 10, 2008 at 9:50 PM, Corey Osgood [EMAIL PROTECTED]wrote:
On Fri, Oct 10, 2008 at 8:14 PM, Carl-Daniel Hailfinger
[EMAIL PROTECTED] wrote:
On 11.10.2008 01:03, ron minnich wrote:
Acked-by: Ronald G. Minnich [EMAIL PROTECTED]
Thanks, committed in r915.
Note that it still
On 11.10.2008 03:51, Corey Osgood wrote:
On Fri, Oct 10, 2008 at 9:50 PM, Corey Osgood [EMAIL PROTECTED]wrote:
On Fri, Oct 10, 2008 at 8:14 PM, Carl-Daniel Hailfinger
[EMAIL PROTECTED] wrote:
On 11.10.2008 01:03, ron minnich wrote:
Acked-by: Ronald G. Minnich [EMAIL
Corey Osgood wrote:
And work it does:
Nice work Carl-Daniel!
//Peter
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Carl-Daniel Hailfinger wrote:
That XIP stuff needs a good explanation anyway. We may want to have
it cover the boot block only or the bootblock and initram. Either
way, reading the whole ROM to cache it may be less than useful and
a severe performance killer early on.
XIP could never perform
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