Am 06.04.2012 22:38 schrieb ron minnich:
> On Fri, Apr 6, 2012 at 11:12 AM, Marc Jones wrote:
>
>>> One such a nice app would be zmodem download of raminit.
>> This is an interesting thought, but really a debug/development
>> feature.
> We even talked about this in v3. But it never got done, seems
On Fri, Apr 6, 2012 at 11:12 AM, Marc Jones wrote:
>> 3. Microcode updates
>>
>> The "tiny" bootblock doesn't seem like the correct place for microcode
>> updates.
>>
>
> Does microcode have to be this early? Before CAR?
Yes. Some history. We started out doing microcode updates in linux.
Then it
Am 06.04.2012 20:12, schrieb Marc Jones:
> There is a lot of assumed configuration ownership in the vendor code,
> and coreboot may need to adjust to that. Something else to consider as
> you design these stages.
Reminds me: can we get rid of platform_cfg.h on AGESA boards, please?
Patrick
--
c
* Kyösti Mälkki [120404 10:54]:
> 3. Microcode updates
>
> The "tiny" bootblock doesn't seem like the correct place for microcode
> updates.
As mentioned in one of the reviews, this is needed on many modern CPUs
before entering Cache As Ram.
Stefan
--
coreboot mailing list: coreboot@coreboot
Hi Kyösti,
i understand the problems you are trying to solve, but I hesitate to
add stages as it makes it that much more confusing and harder to
maintain. I have some specific comments inline.
On Wed, Apr 4, 2012 at 2:54 AM, Kyösti Mälkki wrote:
> Hi!
>
> Looking at some of the changes proposed
Hi!
Looking at some of the changes proposed with the new support of Intel
Sandybridge and Ivybridge, combined with my previous design choices made
with support of Intel Hyper-Threading for NetBurst architectures and SMP
generally, made me share my thoughts of the Coreboot stage -layout.
So there
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