Author: myles Date: 2009-11-18 04:47:34 +0100 (Wed, 18 Nov 2009) New Revision: 4948
Modified: trunk/src/mainboard/technexion/tim5690/cache_as_ram_auto.c Log: This is a patch to control the DIP switch and digital I/O. Signed-off-by: Libra Li <libra...@technexion.com> Acked-by: Myles Watson <myle...@gmail.com> Modified: trunk/src/mainboard/technexion/tim5690/cache_as_ram_auto.c =================================================================== --- trunk/src/mainboard/technexion/tim5690/cache_as_ram_auto.c 2009-11-17 15:20:22 UTC (rev 4947) +++ trunk/src/mainboard/technexion/tim5690/cache_as_ram_auto.c 2009-11-18 03:47:34 UTC (rev 4948) @@ -145,6 +145,20 @@ } #endif /* CONFIG_USE_FALLBACK_IMAGE == 1 */ +/* Early mainboard specific GPIO setup. */ +static void mb_gpio_init(void) +{ + /* Init Super I/O GPIOs. Done early. */ + it8712f_enter_conf(); + outb(IT8712F_CONFIG_REG_LDN, SIO_INDEX); + outb(IT8712F_GPIO, SIO_DATA); + outb(0x62, SIO_INDEX); // set Simple I/O Base Address 0x200 + outb(0x02, SIO_DATA); + outb(0x63, SIO_INDEX); + outb(0x00, SIO_DATA); + it8712f_exit_conf(); +} + void real_main(unsigned long bist, unsigned long cpu_init_detectedx); void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) @@ -177,6 +191,7 @@ /* it8712f_enable_serial does not use its 1st parameter. */ it8712f_enable_serial(0, CONFIG_TTYS0_BASE); + mb_gpio_init(); it8712f_kill_watchdog(); uart_init(); console_init(); -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot