[coreboot] [patch] AMDMCT DDR3 fix Dual rank + high mem frequency.

For Cx, each ChipSel need to be sent MR command. After this patch, tilapia can run in higher memory frequency. To test the high frequency, dont forget to change the freq limit in mcti_d.c: static void mctGet_MaxLoadFreq(struct DCTStatStruc *pDCTstat) { pDCTstat-PresetmaxFreq = 800; }

Re: [coreboot] [patch] AMDMCT DDR3 fix Dual rank + high mem frequency.

* Bao, Zheng zheng@amd.com [110119 10:37]: For Cx, each ChipSel need to be sent MR command. After this patch, tilapia can run in higher memory frequency. To test the high frequency, dont forget to change the freq limit in mcti_d.c: static void mctGet_MaxLoadFreq(struct DCTStatStruc

Re: [coreboot] [patch] AMDMCT DDR3 fix Dual rank + high mem frequency.

. Zheng -Original Message- From: Stefan Reinauer [mailto:stefan.reina...@coreboot.org] Sent: Thursday, January 20, 2011 2:36 AM To: Bao, Zheng Cc: coreboot@coreboot.org Subject: Re: [coreboot] [patch] AMDMCT DDR3 fix Dual rank + high mem frequency. * Bao, Zheng zheng@amd.com [110119