Re: [coreboot] AMD Agesa and AMD CIMx SB800 code. Patch 3 of 8.

2011-02-14 Thread Stefan Reinauer
* Vibrans, Frank frank.vibr...@amd.com [110213 22:49]: Add AMD CIMx SB800 wrapper code. Patch 3 of 8. This code provides southbridge initialization for SB800 south bridges. It is dependent on the AMD CIMx/SB800 code. Signed-off-by Frank Vibrans frank.vibr...@amd.com Acked-by: Stefan

Re: [coreboot] AMD Agesa and AMD CIMx SB800 code. Patch 3 of 8.

2011-02-14 Thread Marc Jones
On Mon, Feb 14, 2011 at 11:07 AM, Stefan Reinauer stefan.reina...@coreboot.org wrote: * Vibrans, Frank frank.vibr...@amd.com [110213 22:49]: Add AMD CIMx SB800 wrapper code.  Patch 3 of 8. This code provides southbridge initialization for SB800 south bridges.  It is dependent on the AMD

Re: [coreboot] AMD Agesa and AMD CIMx SB800 code. Patch 3 of 8.

2011-02-14 Thread Rudolf Marek
Hi Frank, case 0: + //pci_write_config16(dev, 0x64, reg_var[0]); //cause filo can not find sata + break; I think I know why. Most likely the wideIO port is too wide. I created some patches recently to fix it in sb700 code + sb800 and sb600.