[coreboot] Asus M2V-TVM....

Hello I am trying Coreboot on an Asus M2V-TVM based on VIA K8M890CE/8237Rplus which seems quite similar to M2V-MX SE except  superio(ITE 8712F vs 8716F) snd flashrom (SPI vs LPC).  I had modify some files from M2V-MX SE and create devicetree.cb for it. After I  flash it,it simply not w

[coreboot] ASUS M2V-TVM....

Hi,here is the POST output by the serial console == > coreboot-4.0-r Mon Apr 12 13:20:12 CST 2010 starting... > now booting... real_main > Enabling routing table for node 00 done. > Enabling UP settings > Disabling read/write/fill probes for

Re: [coreboot] Asus M2V-TVM....

On 4/10/10 10:54 AM, Chi Min Wang wrote: > Hello > I am trying Coreboot on an Asus M2V-TVM > > based on VIA K8M890CE/8237Rplus which seems quite similar to M2V-MX SE > except superio(ITE 8712F vs 8716F) snd fl

Re: [coreboot] Asus M2V-TVM....

Hi, Please post output of superio tool in verbose mode. Maybe you need to set input to the ITE if it is 48Mhz or 24Mhz, usually it is some bit in CR20-2f I dont have any POST card so i dont know how the IO is routed. Also provide lspci -vvvxxx Check if your image contains following at the e

Re: [coreboot] Asus M2V-TVM....

Rudolf Marek wrote: Hi, Please post output of superio tool in verbose mode. Maybe you need to set input to the ITE if it is 48Mhz or 24Mhz, usually it is some bit in CR20-2f I dont have any POST card so i dont know how the IO is routed. Also provide lspci -vvvxxx Hi,here is the lspci/sup

Re: [coreboot] Asus M2V-TVM....

I didn't see such struct in my image,so maybe it's related to IRQ routing?? It is the ROMSTRAP for HT setup. I think this is the reason why it does not work. If you build image for M2V-MX SE you should see it at the end of the image (same counts for A8V-E SE). Rudolf -- coreboot mailing li

Re: [coreboot] ASUS M2V-TVM....

00K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 05 VIA HT caps: 0075 00after enable_fid_change No other messages after this? What was wrong last time? Thanks, Rudolf -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] ASUS M2V-TVM....

Rudolf Marek wrote: 00K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 05 VIA HT caps: 0075 00after enable_fid_change No other messages after this? What was wrong last time? No more messages,but if I comment the fid/vid related code out(maybe due to my Sempron 3000 la

Re: [coreboot] ASUS M2V-TVM....

does coreboot excute payload or not? On Thu, Apr 15, 2010 at 12:15 AM, Chi Min Wang wrote: > Rudolf Marek wrote: > > 00K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 05 VIA HT caps: 0075 00after enable_fid_change >>> >>> >> No other messages after this? Wha

Re: [coreboot] ASUS M2V-TVM....

Qing Pei Wang wrote: does coreboot excute payload or not? Coreboot says no vaild CBFS header foundBTW,with Sempron 3400(which support CnQ),coreboot could create ACPI_PSS object correctly,so the fid/vid related code should check if the CPU is CnQ capable(although it should be rarely neede

Re: [coreboot] ASUS M2V-TVM....

following for attachment log, there is no payload was found actually. I think there is on payload within coreboot.bin. is there a payload.elf in the coreboot/trunk/ directory? On Thu, Apr 15, 2010 at 4:17 PM, Chi Min Wang wrote: > Qing Pei Wang wrote: > > does coreboot excute payload or not? >>

Re: [coreboot] ASUS M2V-TVM....

Qing Pei Wang wrote: following for attachment log, there is no payload was found actually. I think there is on payload within coreboot.bin. is there a payload.elf in the coreboot/trunk/ directory? but I could see folowing message while make the image,and even "cbfstool coreboot.rom print" sh