Hi Scott,
I agree that several things are missing for a full experience.
I'm just collecting a bunch of pointers where code could come from to be
adapted.
Am Montag, den 24.03.2014, 22:37 -0500 schrieb Scott Duplichan:
1) UEFI support for writing to flash memory. The UEFI name is
Firmware
Allen Yan [mailto:lex...@gmail.com] wrote:
]Oh, sorry, incorrect address!
]http://www.google-]melange.com/gsoc/proposal/public/google/gsoc2014/jinyiyan/5629499534213120
]
]TianoCore as Coreboot payload
]JinyiYan
]
]Short description: The combination of coreboot + TianoCore
]is the most
This is a great start :-)
On Thu, Mar 20, 2014 at 1:56 PM, Allen Yan lex...@gmail.com wrote:
Hi,
coreboot+seabios running in QEMU
output:
coreboot-4.0-5656-gb34739b Thu Mar 13 10:37:43 CST 2014 starting...
CBMEM region 3fee-3fff (cbmem_check_toc)
CBMEM region 3fee-3fff
Hi, everyone,
I've sent a preliminary proposal about Tianocore as coreboot payload.
https://www.google-melange.com/gsoc/proposal/review/student/google/gsoc2014/jinyiyan/5629499534213120
I'd like to get more feedback about the goal and the test environment.
Thanks!
Regards!
Jinyi Yan
--
On Fri, 21 Mar 2014 23:23:51 +0800
Allen Yan lex...@gmail.com wrote:
Hi, everyone,
I've sent a preliminary proposal about Tianocore as coreboot payload.
https://www.google-melange.com/gsoc/proposal/review/student/google/gsoc2014/jinyiyan/5629499534213120
I'd like to get more feedback
Hi, David,
When at AsusTek Suzhou, my work is mainly responsible for bios
porting and fixing bug. There were four mainboards P5KPL-S, P5QL-E,
P5QL-SE, P5QL. All based on Intel platform and AMI Legacy BIOS Core
In the second half year of 2008, I worked on pre-development of
EFI-BIOS for ASUS
On 20.03.2014 11:25, Allen Yan wrote:
Hi, David,
When at AsusTek Suzhou, my work is mainly responsible for bios
porting and fixing bug. There were four mainboards P5KPL-S, P5QL-E,
P5QL-SE, P5QL. All based on Intel platform and AMI Legacy BIOS Core
In the second half year of 2008, I
Vladimir 'φ-coder/phcoder' Serbinenko wrote:
On 20.03.2014 11:25, Allen Yan wrote:
Hi, David,
When at AsusTek Suzhou, my work is mainly responsible for bios
porting and fixing bug.
Do I understand it correctly, that you've had access to proprietary BIOS
code? If so which papers did
On 20.03.2014 13:45, Peter Stuge wrote:
Vladimir 'φ-coder/phcoder' Serbinenko wrote:
On 20.03.2014 11:25, Allen Yan wrote:
Hi, David,
When at AsusTek Suzhou, my work is mainly responsible for bios
porting and fixing bug.
Do I understand it correctly, that you've had access to proprietary
Hi Allen,
There's less than 24 hours left to submit proposals. If you want to do this, I
suggest you get your proposal up before the deadline (March 21st). While I do
not know the details of your employment contract with ASUS, I find it
irrelevant for the purpose of you working on coreboot.
On Mon, Mar 10, 2014 at 2:21 PM, Marc Jones marcj...@gmail.com wrote:
Students:
The GSoC application period has started. Applications are due by March
21 at 19:00 UTC.
https://www.google-melange.com/gsoc/org2/google/gsoc2014/coreboot
put in the proposal. We'll deal with other issues later.
The guy that gave us the first real CAR implementation was an intel
employee who had NDAs out the ...
and it was not an issue.
Let's not start putting in roadblocks. We're not lawyers.
ron
--
coreboot mailing list:
On Thursday, March 20, 2014 08:30:58 AM ron minnich wrote:
in the proposal. We'll deal with other issues later.
The guy that gave us the first real CAR implementation was an intel
employee who had NDAs out the ...
and it was not an issue.
Let's not start putting in roadblocks. We're
On Thu, Mar 20, 2014 at 8:36 AM, mrnuke mr.nuke...@gmail.com wrote:
BTW, has any manufacturer been hostile in the past in any way relating to
coreboot supporting hardware they would rather have kept closed/secret?
ha ha ha ha ha ha ha ha ha ha ha haha ha ha ha ha haha ha ha ha ha
haha ha ha ha
On Thursday, March 20, 2014 09:08:18 AM ron minnich wrote:
On Thu, Mar 20, 2014 at 8:36 AM, mrnuke mr.nuke...@gmail.com wrote:
BTW, has any manufacturer been hostile in the past in any way relating to
coreboot supporting hardware they would rather have kept closed/secret?
ha ha ha ha ha ha
On Thu, Mar 20, 2014 at 9:33 AM, mrnuke mr.nuke...@gmail.com wrote:
On Thursday, March 20, 2014 09:08:18 AM ron minnich wrote:
On Thu, Mar 20, 2014 at 8:36 AM, mrnuke mr.nuke...@gmail.com wrote:
BTW, has any manufacturer been hostile in the past in any way relating to
coreboot supporting
On Thursday, March 20, 2014 09:08:18 AM ron minnich wrote:
On Thu, Mar 20, 2014 at 8:36 AM, mrnuke mr.nuke...@gmail.com wrote:
BTW, has any manufacturer been hostile in the past in any way relating to
coreboot supporting hardware they would rather have kept closed/secret?
ha ha ha ha ha ha
On Thursday, March 20, 2014 09:36:06 AM ron minnich wrote:
How about, all of them at one time or another. One vendor had an
internal memo stating that anyone who talked to me (my name was on it)
about LinuxBIOS would be terminated.
You're popular it seems. How about within this decade
On Thu, Mar 20, 2014 at 9:41 AM, mrnuke mr.nuke...@gmail.com wrote:
Not sure I care much about Intel nowadays. They are already part of the
fellatio_admin group in my books.
No offense intended, but your cares in this case are of no real
importance compared to the cares of the companies that
Hi,
coreboot+seabios running in QEMU
output:
coreboot-4.0-5656-gb34739b Thu Mar 13 10:37:43 CST 2014 starting...
CBMEM region 3fee-3fff (cbmem_check_toc)
CBMEM region 3fee-3fff (cbmem_initialize_empty)
Adding CBMEM entry as no. 1
Adding CBMEM entry as no. 2
Trying CBFS ramstage
Hi,
I am Jinyi Yan , a second year PhD candidate from Shanghai Institute
of Micro-system and Information Technology, Chinese Academy of
Sciences. I used to be a mainboard BIOS engineer in ASUS Technology
Suzhou Co., Ltd for about two years (2007.7~2009.2). My major now is
optoelectronics. But I
On 19.03.2014 21:06, Allen Yan wrote:
As Stefan Tauner's suggestion, maybe porting coreboot to new mainboard
Just a quick note: for porting to new chipset to be accepted, you need to:
1) Justify why this chipset is relevant. E.g. old chipsets most probably
aren't.
2) Prove that you're able to do
well, vladimir, I would not be so discouraging. In fact if it is an
existing mainboard, and you have not done coreboot before, I suggest doing
a port, and then doing something new with the port.
I'd like somebody to look at doing LinuxBIOS again, i.e. getting us back to
the point where we can
ron minnich wrote:
well, vladimir, I would not be so discouraging. In fact if it is an
existing mainboard, and you have not done coreboot before, I suggest
doing a port, and then doing something new with the port.
I think this is a good idea in general.
I'd like somebody to look at doing
Hi!
GSoC 2013 was nice so I decided to apply again and hopefully continue on
the same topic around debugging environment.
Enhance early coreboot debugging
Short description: The traditional way for coreboot developer to make a
port for new mainboard is to add more messages on debug
Hi Jinyi,
Can you provide more details about your work as a BIOS engineer?
As Vladimir said, if the chipset is unsupported then writing MRC for it
will be a very long and difficult process. If the chipset is supported then
adding mainboard support may be a relatively simple task that not
Hi!
After much review and discussions on the list as well as the irc, I have
drafted my proposal for the project Generic Device Interface for ARM SoCs
and upload it on gsoc-melange. It would be great to have reviews on it.
Please provide me with comments/suggestions so that I could improve upon it
On Fri, Mar 14, 2014 at 08:58:01AM -0500, Aaron Durbin wrote:
On Thu, Mar 13, 2014 at 10:15 PM, mrnuke mr.nuke...@gmail.com wrote:
I'm glad you brought that up. I ran into several problems, most of which
were
a result of CBFS's x86-centric design rather than the shortage of SRAM. A
lot
On Sat, Mar 15, 2014 at 10:02 AM, Kevin O'Connor ke...@koconnor.net wrote:
The coreboot code's interaction with the filesystem after memory
init (should) largely boil down to load_file(char *name, void
*address, int maxsize). Why not just end the abstraction there (ie,
on these arm
On Saturday, March 15, 2014 05:15:12 PM Kevin O'Connor wrote:
Did you mean to send this only to me? I'm only sending to you and not
the list, but I'd prefer the discussion to be on list.
OOPS! I blame it on KMail's shitty Reply interface.
On Sat, Mar 15, 2014 at 01:54:47PM -0500, mrnuke
On Thu, Mar 13, 2014 at 10:15 PM, mrnuke mr.nuke...@gmail.com wrote:
On Thursday, March 13, 2014 04:29:06 PM David Hendricks wrote:
On Tue, Mar 11, 2014 at 7:55 AM, Naman Govil naman...@gmail.com wrote:
Hi!
Hi!
Hi!
a generic interface for
accessing block devices on ARM SoCs so that
Am Donnerstag, den 13.03.2014, 22:15 -0500 schrieb mrnuke:
I'm glad you brought that up. I ran into several problems, most of which were
a result of CBFS's x86-centric design rather than the shortage of SRAM. A lot
of CBFS callers love to generate map() calls, which means we as the backend
We've been kind of holding off on this, but, fact is, coreboot has followed
the well trod path of firmware everywhere and become a small kernel. It
started as little more than memcpy with a frisson of I2C packet IO thown
in, but thanks to the generous ideas of hardware designers everywhere, with
Am Freitag, den 14.03.2014, 08:07 -0700 schrieb ron minnich:
There's not much point in fighting the tide here. The idea of linux-as-bios
was nice, but we have come to the point where linux-as-bios requires a
small firmware kernel just to load it.
Which could just as well be UEFI.
Patrick
--
On Fri, Mar 14, 2014 at 8:14 AM, Patrick Georgi patr...@georgi-clan.dewrote:
Am Freitag, den 14.03.2014, 08:07 -0700 schrieb ron minnich:
There's not much point in fighting the tide here. The idea of
linux-as-bios
was nice, but we have come to the point where linux-as-bios requires a
Hi All,
Sorry if I am a bit OT to this thread, due to my limited knowledge about
coreboot CBFS at this stage, but I would like add few points.
Firstly, as Alex mentioned
If, on the other hand, you have a well designed, unified block dev API, you
can select your block device based on some some
On Fri, Mar 14, 2014 at 9:23 AM, Naman Govil naman...@gmail.com wrote:
I agree with the long term goal, but from the point of view of a project
in GSoC, is'nt it better for me to implement the block device API first,
and then in the course of time think about the generic device interface?
On Friday, March 14, 2014 09:46:53 AM ron minnich wrote:
In other words, you can design a special case that makes doing a good
design of the general case almost impossible. That's been done too; see
UEFI.
:)
--
coreboot mailing list: coreboot@coreboot.org
On Tue, Mar 11, 2014 at 7:55 AM, Naman Govil naman...@gmail.com wrote:
Hi!
Hi!
I am Naman, a junior year college undergrad with interest in Open Source
Hardware-Software Development.
I have been actively participating in coreboot community (mainly through
the irc) for more than a month
On Thursday, March 13, 2014 04:29:06 PM David Hendricks wrote:
On Tue, Mar 11, 2014 at 7:55 AM, Naman Govil naman...@gmail.com wrote:
Hi!
Hi!
Hi!
a generic interface for
accessing block devices on ARM SoCs so that coreboot could launch its
stages from the block devices (an MMC for
Hi!
I am Naman, a junior year college undergrad with interest in Open Source
Hardware-Software Development.
I have been actively participating in coreboot community (mainly through
the irc) for more than a month now, and have had lots of discussions with
community mentors, while setting up
Students:
The GSoC application period has started. Applications are due by March
21 at 19:00 UTC.
https://www.google-melange.com/gsoc/org2/google/gsoc2014/coreboot
http://www.coreboot.org/GSoC#coreboot_Summer_of_Code_Application
Mentors:
Please create a connection to coreboot in melange.
Hi,
I am Muhammad Ramshad currently pursuing my degree program in University of
Moratuwa in the field of Electronic and Telecommunication Engineering.
I am always interested learning new technologies and knowledge, so i found
that GSoC is really a good platform for me to learn new things.
When i
On 02.03.2014 09:01, Muhammad Ramshad wrote:
When i search through the projects and organizations the coreboot
project grabbed my focus towards it because i am more interested in
Digital System Design and hardware a level development like processor
design and ISA designs.
And absolutely no
On Sun, Mar 02, 2014 at 12:12:38PM +0100, Vladimir 'φ-coder/phcoder' Serbinenko
wrote:
On 02.03.2014 09:01, Muhammad Ramshad wrote:
When i search through the projects and organizations the coreboot
project grabbed my focus towards it because i am more interested in
Digital System Design
Hi Ramshad,
On Sun, Mar 2, 2014 at 1:00 AM, Muhammad Ramshad
ramshadsosm...@gmail.com wrote:
Hi,
I am Muhammad Ramshad currently pursuing my degree program in University of
Moratuwa in the field of Electronic and Telecommunication Engineering.
I am always interested learning new technologies
Hi Muhammad,
On Sun, Mar 2, 2014 at 1:01 AM, Muhammad Ramshad
ramshadsosm...@gmail.com wrote:
Hi,
I am Muhammad Ramshad currently pursuing my degree program in University of
Moratuwa in the field of Electronic and Telecommunication Engineering.
I am always interested learning new
Hello coreboot,
We (coreboot) are going to apply for GSoC 2014 again this year. We had
a very successful 2013 and I would like to keep the momentum. We need
your help to do that.
- We are seeking active contributors to mentor students. If you are
interested, please update the mentor section on
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