How soon after reset are port 0x80 messages available on a MiniPCIe attached POST card? And would the POST card be expected to work with a M.2 to MiniPCIe adapter? How is the ISA bus' I/O address space mapped to PCIe devices?
I'm dealing an early bring-up problem on a modern architecture without serial ports and wondering if that would a good way to debug it. -- Trammell -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
