the following patch was just integrated into master:
commit 7bc153c6aef0f2615e3dadb274b9fed56ed15732
Author: Mike Loptien <mike.lopt...@se-eng.com>
Date: Wed Mar 13 16:28:16 2013 -0600
Eagleheights DSDT: Grant OS control through OSC
Change the OSC method to actually grant control of
PCIe capabilities to the OS instead of granting no
control. I believe the logic was backwards in the
original commit. Bits should be set when granting
control and cleared when not granting control. By
setting the return value to 0x00, we effectively
tell the OS that it cannot control any PCIe
capability. See section 6.2.9 of the ACPI spec
version 3.0 for more information.
This edit is a duplication of the OSC method that
is in the src/southbridge/intel/bd82x6x/pch.asl
file.
Change-Id: Id2462ab12203afceb9033f24d06b4dfbf2236d2e
Signed-off-by: Mike Loptien <mike.lopt...@se-eng.com>
Reviewed-on: http://review.coreboot.org/2714
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminn...@gmail.com>
Build-Tested: build bot (Jenkins) at Wed Mar 13 23:43:11 2013, giving +1
Reviewed-By: Ronald G. Minnich <rminn...@gmail.com> at Wed Mar 13 23:44:00
2013, giving +2
See http://review.coreboot.org/2714 for details.
-gerrit
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