the following patch was just integrated into master:
commit b9ea8b3fb0082840b0c9d449535f4c49c2e885ac
Author: Aaron Durbin <adur...@chromium.org>
Date: Fri Nov 2 09:10:30 2012 -0500
lynxpoint: PMIR register rename
The register that controls global reset is named the Power
Mangement Initialization Regiser (PMIR). Update the defines
to reflect the documentation.
Additionally, there is no core well reset control according to the
EDS. There is, however, a CF9 lock field to lock this register down.
Change-Id: I773c33bec63a06cdb869eb9f94553d476e492798
Signed-off-by: Aaron Durbin <adur...@chromium.org>
Reviewed-on: http://review.coreboot.org/2619
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminn...@gmail.com>
Build-Tested: build bot (Jenkins) at Mon Mar 11 23:23:09 2013, giving +1
Reviewed-By: Ronald G. Minnich <rminn...@gmail.com> at Thu Mar 14 06:33:32
2013, giving +2
See http://review.coreboot.org/2619 for details.
-gerrit
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