Kyösti Mälkki (kyosti.mal...@gmail.com) just uploaded a new patch set to 
gerrit, which you can find at http://review.coreboot.org/1831

-gerrit

commit da29002cb4df643c5b2520852caaaecf45cc3a0e
Author: Kyösti Mälkki <kyosti.mal...@gmail.com>
Date:   Wed Nov 14 08:09:02 2012 +0200

    Use mainboard hook for HP DL165
    
    The board incorrectly overrides the southbridge hook, so use the
    new mainboard hook instead. This change also activates the actual
    southbridge hook to enable decode of complete 4 MB flash memory region.
    
    Change-Id: I02c6fe89ae9ad4a7403f024fac875ebd88a8e142
    Signed-off-by: Kyösti Mälkki <kyosti.mal...@gmail.com>
---
 src/mainboard/hp/dl165_g6_fam10/Kconfig     | 2 +-
 src/mainboard/hp/dl165_g6_fam10/bootblock.c | 8 +++++++-
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/src/mainboard/hp/dl165_g6_fam10/Kconfig 
b/src/mainboard/hp/dl165_g6_fam10/Kconfig
index cdff24f..43c4243 100644
--- a/src/mainboard/hp/dl165_g6_fam10/Kconfig
+++ b/src/mainboard/hp/dl165_g6_fam10/Kconfig
@@ -90,7 +90,7 @@ config HEAP_SIZE
        hex
        default 0xc0000
 
-config BOOTBLOCK_SOUTHBRIDGE_INIT
+config BOOTBLOCK_MAINBOARD_INIT
        string
        default "mainboard/hp/dl165_g6_fam10/bootblock.c"
 
diff --git a/src/mainboard/hp/dl165_g6_fam10/bootblock.c 
b/src/mainboard/hp/dl165_g6_fam10/bootblock.c
index 2c56c4c..479e0b6 100644
--- a/src/mainboard/hp/dl165_g6_fam10/bootblock.c
+++ b/src/mainboard/hp/dl165_g6_fam10/bootblock.c
@@ -18,6 +18,9 @@ static inline void shc4307_exit_ext_func_mode(device_t dev)
 #define DBG_DEV  PNP_DEV(SCH4307_CONFIG_PORT, 0x3)
 #define REGS_DEV PNP_DEV(SCH4307_CONFIG_PORT, 0xa)
 
+/* FIXME: This appears to be a super-io initialisation,
+ *        placed in the mainboard directory.
+ */
 void shc4307_init(void)
 {
        shc4307_enter_ext_func_mode(CMOS_DEV);
@@ -43,6 +46,9 @@ void shc4307_init(void)
        shc4307_exit_ext_func_mode(CMOS_DEV);
 }
 
-static void bootblock_southbridge_init(void) {
+static void bootblock_mainboard_init(void)
+{
+       bootblock_northbridge_init();
+       bootblock_southbridge_init();
        shc4307_init();
 }

-- 
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot

Reply via email to