[coreboot] Re: RAM without SPD

Hi Michal, Thank you very much for your help. Best regards, Zvika On Thu, Feb 21, 2019 at 10:17 AM Michal Zygowski wrote: > > On 20.02.2019 22:14, Zvi Vered wrote: > > Hi Michal, > > Hi Zvika, > > > Your detailed answer is highly appreciated ! > > The output I got on the console is: > ... > M

[coreboot] Re: RAM without SPD

On 20.02.2019 22:14, Zvi Vered wrote: > Hi Michal, Hi Zvika, > > Your detailed answer is highly appreciated ! > > The output I got on the console is: > ... > Memory Down Data Existed : Enabled > - Speed (0: 800, 1: 1066, 2: 1333, 3: 1600): 2 > - Type  (0: DDR3, 1: DDR3L) : 1 > - DIMM0        : Dis

[coreboot] Re: RAM without SPD

Hi Michal, Your detailed answer is highly appreciated ! The output I got on the console is: ... Memory Down Data Existed : Enabled - Speed (0: 800, 1: 1066, 2: 1333, 3: 1600): 2 - Type (0: DDR3, 1: DDR3L) : 1 - DIMM0: Disabled - DIMM1: Disabled - Width: x8 - Density

[coreboot] Re: RAM without SPD

On 2/19/19 7:50 PM, Zvi Vered wrote: > Hi Michal, > > Thank you very much for your reply.  > > You are right. I have soldered down memory. No dimm slot.  > In what routine should I  configure RAM ?  Where can I see a sample code ? coreboot has everything prepared for that. What I would do is to lo

[coreboot] Re: RAM without SPD

Hi Michal, Thank you very much for your reply. You are right. I have soldered down memory. No dimm slot. In what routine should I configure RAM ? Where can I see a sample code ? >From the RAM vendor I got the following table: Part Number Byte Number Byte Description Byte Value MT4KTF25664HZ-1

[coreboot] Re: RAM without SPD

On 18.02.2019 20:28, Zvi Vered wrote: > Hello, Hi Zvika, > > I suspect the RAM on my bay-trail module has no SPD interface.  > Can Intel's FSP work without SPD ? > > I tried to run decode-dimms with vendor's bios and got: > No EEPROM found, try loading the eeprom or at24 module > It looks like You