Adds LCD controller (LCDC) driver for TI's DA8xx/OMAP-L1xx
architecture. LCDC specifications can be found at
http://www.ti.com/litv/pdf/sprufm0a.
LCDC on DA8xx consists of two independent controllers, the
Raster Controller and the LCD Interface Display Driver (LIDD)
controller. LIDD further
Hi Steve,
Where can I get the latest kernel version from? I check TI website but I
didn't find it.
Thanks,
Azam.
On Fri, Jul 10, 2009 at 3:52 AM, Steve Chen sc...@mvista.com wrote:
On Thu, 2009-07-09 at 21:00 +0530, Azam Ansari wrote:
...
constant
From: Rajashekhara, Sudhakar sudhakar@ti.com
With the introduction of TI da850/omap-l138, some of the macros
defined for da830/omap-l137 will be needed in da850 source file.
So, move the common macros to da8xx.h header file.
Also, modify the macro names from DA830_... to DA8XX_.
On Fri, Jul 10, 2009 at 12:01:23, Andrey Panin wrote:
On 191, 07 10, 2009 at 01:19:34AM -0400, Sudhakar Rajashekhara wrote:
Adds LCD controller (LCDC) driver for TI's DA8xx/OMAP-L1xx
architecture. LCDC specifications can be found at
http://www.ti.com/litv/pdf/sprufm0a.
LCDC on DA8xx
Adds LCD controller (LCDC) driver for TI's DA8xx/OMAP-L1xx
architecture. LCDC specifications can be found at
http://www.ti.com/litv/pdf/sprufm0a.
LCDC on DA8xx consists of two independent controllers, the
Raster Controller and the LCD Interface Display Driver (LIDD)
controller. LIDD further
In EDMA resource structure, instead of passing EDMA CC
interrupt, EDMA TC error interrupt number is being passed.
Before the patch:
r...@arago:~# cat /proc/interrupts
CPU0
12: 0 cp_intc edma_error
13: 0 cp_intc edma
The DA850/OMAP-L138 is a new SoC from TI in the same family as
DA830/OMAP-L137.
Major changes include better support for power management,
support for SATA devices and McBSP (same IP as DM644x).
DA850/OMAP-L138 documents are available at
Add support for the DA850/OMAP-L138 Evaluation Module (EVM)
from TI. The EVM has User Interface (UI) card which contains
various devices. This UI card can be connected to the base
board. Support for all the devices on the UI card and ones on
the EVM will be added in subsequent patches.
The EVM
Hi,
I think you can fine tune the EMIFA settings in the boot loader to
align with more optimized read/write latencies for the NAND in
question!
ThanX!
Sundar
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On Fri, 2009-07-10 at 12:11 +0530, Azam Ansari wrote:
Hi Steve,
Where can I get the latest kernel version from? I check TI website but
I didn't find it.
Thanks,
Azam.
TI's LSP 2.x are based on 2.6.18 kernel which does not have full PM
support, so TI won't be able to provide a solution
Sundar a écrit :
Hi,
I think you can fine tune the EMIFA settings in the boot loader to
align with more optimized read/write latencies for the NAND in
question!
It looks as if they are already optimised :
Read and Write strobe are set to 4+1 = 5 clock cycle.
Correct me if I am wrong, but the
DM646x has MUSB connected to IRQs 13 and 14 (unlike IRQ12 on other platforms),
so pass the correct IRQ resources with the platform device.
Signed-off-by: Dmitry Krivoschekov dkrivosche...@ru.mvista.com
Signed-off-by: Sergei Shtylyov sshtyl...@ru.mvista.com
---
The patch has been reworked based
Jean-Philippe François a écrit :
Sundar a écrit :
Hi,
I think you can fine tune the EMIFA settings in the boot loader to
align with more optimized read/write latencies for the NAND in
question!
It looks as if they are already optimised :
Read and Write strobe are set to 4+1 = 5 clock cycle.
Mani, Arun wrote:
Hi,
I am trying the latest 2.6.31 rc2 branch. I am trying to make the Audio work.
I found that the I2S clock is set to NULL. Because of this I am getting a
NODEV error.
If I commented the check, I was able to map the I2S to the AIC33X. but I am
not getting any sound.
You
On Wednesday 01 July 2009 03:44:52 Steve Chen wrote:
On Tue, 2009-06-30 at 15:54 -0700, David Brownell wrote:
On Tuesday 30 June 2009, Steve Chen wrote:
Can you try
aplay -D hw:0,1 r441_c2.wav
If you see something like
Warning: rate is not accurate (requested = 44100Hz,
Yes it is the clk_get ind davinci-i2s.c fine. I am using 26.31-rc2
-Original Message-
From: Mark Brown [mailto:broo...@opensource.wolfsonmicro.com]
Sent: Friday, July 10, 2009 3:40 PM
To: Mani, Arun
Cc: Troy Kisky; davinci-linux-open-source@linux.davincidsp.com;
The clock is indeed initialized in board_dm355.c. The problem is the clock name
is not given to the clk_get function. I hard coded the clock name to asp1(since
it is dm355) and found out that this helps register the i2s and aic33x. but
when I ran aplay and arecord, the clock is not correct and
On Mon, Jun 29, 2009 at 07:25:43PM +0300, Yusuf Caglar AKYUZ wrote:
Denys Dmytriyenko wrote:
Another heads up - the next branch is now rebased with vpfe v3 patches.
Thanks again. Now I'm using your next branch for my own development.
FYI, I've rebased the next branch of
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