Karicheri, Muralidharan wrote:
> Troy,
>
>
>> I personally like the idea behind this patch. But I have
>> heard others argue against it. But it is not related to the
>> ^C issue others have mentioned.That should not happen in
>> the GIT kernel.
>>
> I do get this ^c timeout issue in DM6446 and DM
linghai624 writes:
> when I boot the davinci git kernel 2.6.23 uImage ,I meet the problem as
> follow,I don't know what the problem it is ! Hlep ,thanks!
Is there a reason you're using DaVinci git from 2.6.23?
I suggest you pull the latest DaVinci git[1] which is based a
v2.6.31-rc4 and th
Troy,
>
>I personally like the idea behind this patch. But I have
>heard others argue against it. But it is not related to the
>^C issue others have mentioned.That should not happen in
>the GIT kernel.
>
I do get this ^c timeout issue in DM6446 and DM355. I have the video loopback
application ru
This patch adds platform data for the 8MB NOR flash
found on da850/omap-l138 EVM. Both NOR and NAND can
co-exist on da850/omap-l138 as they are using different
chip selects.
Signed-off-by: Sudhakar Rajashekhara
---
This patch has been tested on DA850/OMAP-L138 EVM.
This patch depends on the fo
On Fri, 2009-07-24 at 15:26 +0530, Azam Ansari wrote:
> Hi Steve,
>
> I was able to put PLL0 in bypass mode on DM355.
>
> But I am unable to put PLL1 in bypass mode since PLL1 supplies clock
> to DDR memory.
>
> Can you please tell me how do I make DDR memory to use the internal
> clock instead
On Fri, 2009-07-24 at 13:07 +0530, Vinayagam Mariappan wrote:
> Hi All,
>
> we get following message continuously when we rebuild DM365 DVSDK
> (dvsdk_2_10_01_18).
>
> Rebuild Error Message is below,
>
> Building package interface for dmai..
> gmake: Warning: File
> `/home/Vina/dvsdk_2_10_01_
Dear INAGAKI and SUZUKI,
I used your patch for putting DM355 in deep sleep.
While going to deep sleep the code works fine. But when I try to wake up
DM355 it fails sometime,
wake-up fails randomly. Please can you suggest me what can be the problem.
I am using kernel version 2.6.10 and I added t
Hi Steve,
I was able to put PLL0 in bypass mode on DM355.
But I am unable to put PLL1 in bypass mode since PLL1 supplies clock to DDR
memory.
Can you please tell me how do I make DDR memory to use the internal clock
instead of PLL1 clock?
Is it possible to put PLL1 in bypass mode?
Thanks,
azam.
Hi All,
we get following message continuously when we rebuild DM365 DVSDK
(dvsdk_2_10_01_18).
Rebuild Error Message is below,
Building package interface for dmai..
gmake: Warning: File
`/home/Vina/dvsdk_2_10_01_18/xdctools_3_15_01_59/packages/xdc/bld/xdc_rules.mak'
has modification time 4.2e+
hello,
I downloaded a snapshot of the git tree 2.6.23 and tried to build it. I
get the following error when building the DaVinci MMC driver:
drivers/mmc/host/davinci_mmc.c: In function `mmc_davinci_start_dma_transfer':
drivers/mmc/host/davinci_mmc.c:414: error: structure has no member named
`b
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