On Fri, Oct 16, 2009 at 01:57:32AM +, 임충권 wrote:
Hello
I want to make a device that communicates with davinci through VLYNQ
but I don't really know how VLYNQ works, specially how the link is
stablished.
SPRUE36.pdf seems to have an incomplete VLYNQ protocol specification.
In
Hi,
I would like to rebuild images from dpcm encoded images.
Does anyone knows how the dpcm encoder details when working in simple mode ?
How is the error (difference between predicted value and current value)
quantized and encoded ?
Thank you.
Jean-Philippe François
From: Vaibhav Hiremath hvaib...@ti.com
The I2C adapter ID is actually depends on Board and may vary, Davinci
uses id=1, but in case of AM3517 id=3.
Changes:
- Fixed review comments (Typo) from Sergei
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
-Original Message-
From: Hiremath, Vaibhav
Sent: Friday, October 16, 2009 3:57 PM
To: linux-me...@vger.kernel.org
Cc: davinci-linux-open-source@linux.davincidsp.com; Hiremath,
Vaibhav
Subject: [Resubmition PATCH] Davinci VPFE Capture: Take i2c adapter
id through platform data
The clock divider value can be calculated from the pixel clock
value for the panel. This gives more flexiblity to the driver
to change the divider value on the fly as in the case of cpufreq
feature- support for which will be added shortly.
Signed-off-by: Chaithrika U S chaithr...@ti.com
---
This
All,
Please ignore this patch, will post an updated version soon.
Regards,
Chaithrika
On Fri, Oct 16, 2009 at 15:57:02, Chaithrika U S wrote:
The clock divider value can be calculated from the pixel clock
value for the panel. This gives more flexiblity to the driver
to change the divider
The clock divider value can be calculated from the pixel clock
value for the panel. This gives more flexiblity to the driver
to change the divider value on the fly as in the case of cpufreq
feature- support for which will be added shortly.
Signed-off-by: Chaithrika U S chaithr...@ti.com
---
This
Dmitry,
Is this version 6 ready to be pushed?
Thanks,
Miguel Aguilar
miguel.agui...@ridgerun.com wrote:
From: Miguel Aguilar miguel.agui...@ridgerun.com
Adds the driver for enabling keypad support for DaVinci platforms.
DM365 is the only platform that uses this driver at the moment.
Kevin,
I would like to wait on this one and re-submit a revised patch. There is a plan
to use sub device model for ccdc driver. So I will re-submit the ccdc drivers
with this change as well as the corresponding platform code.
Murali Karicheri
Software Design Engineer
Texas Instruments Inc.
Vaibhav,
Thanks for the patch. See my comment below.
Murali Karicheri
Software Design Engineer
Texas Instruments Inc.
Germantown, MD 20874
phone: 301-407-9583
email: m-kariche...@ti.com
-Original Message-
From: davinci-linux-open-source-boun...@linux.davincidsp.com
Karicheri, Muralidharan m-kariche...@ti.com writes:
I would like to wait on this one and re-submit a revised
patch. There is a plan to use sub device model for ccdc driver. So I
will re-submit the ccdc drivers with this change as well as the
corresponding platform code.
Murali,
OK, thanks
Chaithrika U S chaithr...@ti.com writes:
The clock divider value can be calculated from the pixel clock
value for the panel. This gives more flexiblity to the driver
to change the divider value on the fly as in the case of cpufreq
feature- support for which will be added shortly.
Running 2.6.10 on a DM6467 I see usleep having a minimum resolution of
10ms..
For DM6467, and other ARM Davinci linux implementations, 2.6.10 based
specifically, how does one get the jiffies to 1ms, instead of what
appears to be 10ms?
I believe I have HIGHRES timers enabled...
Anything else one
On Fri, 2009-10-16 at 10:15 -0700, Roberts, Randy wrote:
Running 2.6.10 on a DM6467 I see usleep having a minimum resolution of
10ms..
For DM6467, and other ARM Davinci linux implementations, 2.6.10 based
specifically, how does one get the jiffies to 1ms, instead of what
appears to be 10ms?
Hi Steve,
I haven't applied any additional patches to the stock MV 2.6.10 release
[r...@flir ~]# cat /proc/version
Linux version 2.6.10_mvl401-davinci_evm-PSP_01_30_00_082 (gcc version
3.4.3 (MontaVista 3.4.3-25.0.104.0600975 2006-07-06)) #1 Fri Oct 16
10:29:49 PDT 2009
I noticed a
Hello.
Steve Chen wrote:
Running 2.6.10 on a DM6467 I see usleep having a minimum resolution of
10ms..
I'm not seeing this function in either recent kernels or MV's 2.6.10.
Perhaps you meant msleep()?
For DM6467, and other ARM Davinci linux implementations, 2.6.10 based
specifically,
Roberts, Randy wrote:
Oooh...it gets worse...
I hadn't previously had CONFIG_PREEMPT_RT defined in kernel
config...tried it, rebuilt...but, I get this message when I try to
rebuild dsp/bios link
drv_pmgr.c:146:2: #error Realtime preemption is not supported with this
version of DSP/BIOS Link
On Fri, 2009-10-16 at 10:57 -0700, Paul Stuart wrote:
We're seeing the same thing on our DM355-based system with the 2.6.10 kernel.
Steve, can you point us to the patch you mentioned below?
From: davinci-linux-open-source-boun...@linux.davincidsp.com
On Fri, 2009-10-16 at 22:07 +0400, Sergei Shtylyov wrote:
Hello.
Steve Chen wrote:
Running 2.6.10 on a DM6467 I see usleep having a minimum resolution of
10ms..
I'm not seeing this function in either recent kernels or MV's 2.6.10.
Perhaps you meant msleep()?
For DM6467, and
The #define HZ 1000 did the trick! (with no further changes
required...original CONFIG_PREEMPT_DESKTOP, etc.)
Thanks!
Randy
-Original Message-
From: Sergei Shtylyov [mailto:sshtyl...@ru.mvista.com]
Sent: Friday, October 16, 2009 11:08 AM
To: Roberts, Randy
Cc: Steve Chen;
From: Sandeep Paulraj s-paul...@ti.com
The parent clock for the USB source clock is actually PLL1 aux clock,
not PLL2 sysclk1.
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-davinci/dm365.c |2 +-
1 files changed, 1
This series includes various platform updates to the DaVinci
family SoCs which are targeted for the next merge window (2.6.33.)
This series based on v2.6.32-rc5 and is available as the
'davinci-next' branch of DaVinci git[1]. This branch is also
automatically included in linux-next.
Kevin
[1]
From: Phaneendra Kumar ph...@embwise.com
This patch fixes a typo/bug in the DM365 SDIO interrupt assignment
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-davinci/devices.c |2 +-
1 files changed, 1 insertions(+), 1
From: Mark A. Greer mgr...@mvista.com
Some mcasp code was inserted between the emac resource setup
and the related register routine that registers the emac.
Signed-off-by: Mark A. Greer mgr...@mvista.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
From: Mark A. Greer mgr...@mvista.com
The DA830/OMAP-L137 EVM cannot use the default pinmux setup for McASP1
so put the correct settings in the board file for that platform.
Signed-off-by: Mark A. Greer mgr...@mvista.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
From: Sekhar Nori nsek...@ti.com
This makes it clear that JTAG ID register is part of the
SYSCFG module
Signed-off-by: Sekhar Nori nsek...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-davinci/da830.c |3 ++-
arch/arm/mach-davinci/da850.c
From: Sekhar Nori nsek...@ti.com
Avoid use of IO_ADDRESS() for SYSCFG module by doing an ioremap() instead.
Signed-off-by: Sekhar Nori nsek...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-davinci/da830.c |7 ++-
From: Sekhar Nori nsek...@ti.com
Rename the DA8XX_BOOT_CFG_BASE macro to get it in line
with the public documentation for these parts.
Signed-off-by: Sekhar Nori nsek...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-davinci/da830.c |2 +-
From: Mark A. Greer mgr...@mvista.com
For consistency with existing code, change the name of
da8xx_init_mcasp() to da8xx_register_mcasp().
Signed-off-by: Mark A. Greer mgr...@mvista.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-davinci/board-da830-evm.c|2
From: Sekhar Nori nsek...@ti.com
Achieve easy top down traversal of clock tree by keeping
track of each clock's list of children.
This is useful in supporting DVFS where clock rates of
all children need to be updated in an efficient manner.
Signed-off-by: Sekhar Nori nsek...@ti.com
From: Sekhar Nori nsek...@ti.com
The patch allows Async3 clock source to be selected between PLL1 SYSCLK2
and PLL0 SYSCLK2.
Having Async3 source from PLL1 SYSCLK2 allows peripherals on that
domain to remain unaffected by frequency scaling on PLL0.
Signed-off-by: Sekhar Nori nsek...@ti.com
From: Sekhar Nori nsek...@ti.com
clk_round_rate, clk_set_rate have been updated to handle dynamic
frequency changes.
The motivation behind the changes is to support dynamic CPU frequency
change.
davinci_set_pllrate() changes the PLL rate of a given PLL. This function
has been presented as a
From: Hemant Pedanekar hema...@ti.com
DM6467 silicon revisions 3.x have variant field in JTAGID register as '1'.
This path adds entry for the same in dm646x_ids to be able to boot on boards
with 3.x revision chips.
Also modifies name for 'variant=0' (revisions 1.0, 1.1).
Signed-off-by: Hemant
From: Mark A. Greer mgr...@mvista.com
Add support for the Sharp LCD035Q3DG01 graphical LCD. This
requires a minor interface change to da8xx_register_lcdc()
so that the board code can pass in the platform_data which
describes the lcd controller that's to be used.
Signed-off-by: Mark A. Greer
From: Sekhar Nori nsek...@ti.com
The clk_set_parent() API is implemented to enable re-parenting
clocks in the clock tree.
This is useful in DVFS and helps by shifting clocks to an asynchronous
domain where supported by hardware
Signed-off-by: Sekhar Nori nsek...@ti.com
Signed-off-by: Kevin
From: David A. Griego dgri...@mvista.com
Add pinmux settings, etc. to enable the MMC/SC hardware.
Signed-off-by: David A. Griego dgri...@mvista.com
Signed-off-by: Mark A. Greer mgr...@mvista.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-davinci/board-da830-evm.c
From: Steve Chen sc...@mvista.com
Add graphics support for the Sharp LCD035Q3DG01 graphical
LCD that's on the User Interface (UI) daughter card of the
DA830/OMAP-L137 EVM.
The LCD shares EMIFA lines with the NAND and NOR devices that
are also on the UI card so those lines are shared via a couple
From: Sandeep Paulraj s-paul...@ti.com
The edma_alloc_cont_slots API is used for obtaining a set of
contiguous slots. When we use the _ANY option with this
API, by definition of this option it is suppossed to start
looking for a set of contiguous slots starting from slot 64 for
DaVinci SOC's and
From: Sneha Narnakaje nsnehapra...@ti.com
This patch updates the NAND driver platform data to use 4-bit ECC and the
ECC_HW/ECC_HW_OOB_FIRST modes.
Signed-off-by: Sneha Narnakaje nsnehapra...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
From: Sudhakar Rajashekhara sudhakar@ti.com
On the latest DA850/OMAP-L138 EVM (Beta) the GPIO pin
number of LCD panel power has changed. This patch takes
care of this change. Software will support only Beta
versions of DA850/OMAP-L138 EVM.
In the process, add the missing entry for data pin 0
From: Sandeep Paulraj s-paul...@ti.com
In the edma_free_cont_slots API, the variable slot was being modified
and then used in the for loop.
This results in incorrect behaviour when the API is used.
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
Signed-off-by: Kevin Hilman
From: Sergei Shtylyov sshtyl...@ru.mvista.com
On this board the OHCI port's power control and over-current signals from
TPS2065 power switch are connected via GPIO1[15] and GPIO2[1] respectively,
so we can implement the DA8xx OHCI glue layer's hooks for overriding the
root hub port's power and
From: Sneha Narnakaje nsnehapra...@ti.com
This patch updates the NAND driver platform data to use 4-bit ECC and the
ECC_HW/ECC_HW_OOB_FIRST modes.
Signed-off-by: Sneha Narnakaje nsnehapra...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
The machine name string shows up in /proc/cpuinfo under 'Hardware' and
can be used by userspace apps. Make the format consistent with the
DA850/OMAP-l138 EVM by adding the '-' between OMAP and L137.
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
All that is needed is the existing #include linux/gpio.h
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-davinci/board-da830-evm.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-davinci/board-da830-evm.c
From: Sekhar Nori nsek...@ti.com
Adds a basic CPUFreq driver for DaVinci devices registering with the
kernel CPUFreq infrastructure.
Support is added for both frequency and voltage regulation.
Signed-off-by: Sekhar Nori nsek...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
From: Sekhar Nori nsek...@ti.com
Adds basic frequency scaling support for DA850/OMAP-L138.
Currently, frequency scaling only on PLL0 is supported. No scaling of PLL1
as yet.
Peripherals like MMC/SD which have a clock input synchronous with
ARM clock will not work well since the clock will
Newer revs of da830 silicon have different 'variant' field of the JTAG
id register. Current code only supports rev 1.0 silicon.
This patch adds support for rev1.1 and rev2.0 silicon and updates
the 'name' strings to add a '-' between 'omap' 'l137' to have
consistent naming with da850/omap-l138.
From: Sekhar Nori nsek...@ti.com
This patch adds support for regulating the CVDD voltage for the
DA850/OMAP-L138 platform.
The CVDD min and max values for each OPP have been obtained from
section 5.2 Recommended Operating Conditions of SPRS586
Signed-off-by: Sekhar Nori nsek...@ti.com
From: Sekhar Nori nsek...@ti.com
include/mach/system.h uses the cpu_do_idle() function which is
defined in asm/proc-fns.h. Without this patch including system.h
leads to error of the sort:
error: implicit declaration of function 'cpu_do_idle'
Signed-off-by: Sekhar Nori nsek...@ti.com
From: Chaithrika U S chaithr...@ti.com
DA850/OMAP-L138 EVM can be connected to an UI card which has various
peripherals on it.The UI card has TCA6416 expander which can be probed
to check whether the UI card is connected or not. If the UI card is
connected, setup NOR and NAND devices. This is
From: Sekhar Nori nsek...@ti.com
This patch makes it easier to identify SoC init failures
by panicing when SoC init fails. Without successful SoC
init, the kernel eventually fails when attempt is made to
access the clocks.
Also, an error is printed when JTAG ID match fails to make
it easier to
From: Hemant Pedanekar hema...@ti.com
This patch adds platform data and partition info for NAND on dm6467 EVM.
Note that the partition layout is dependent on the UBL, U-Boot etc. used. This
patch tries to minimize that dependency by setting first partition for UBL,
U-Boot and environment
From: Chaithrika U S chaithr...@ti.com
DA850/OMAP-L138 EVM has a RMII Ethernet PHY on the UI daughter card. The PHY
is enabled by proper programming of the IO Expander (TCA6416) ports. Also for
RMII PHY to work, the MDIO clock of MII PHY has to be disabled since both the
PHYs have the same
From: Sergei Shtylyov sshtyl...@ru.mvista.com
Replace badly chosen 'psc_ctlr' name of the 'struct clk' field (PSC already
means Power and Sleep Controller, so the '_ctlr' postfix makes the name
tautological) with technically correct 'gpsc' (Global PSC -- which contains
all the module registers).
FYI...
Build and boot tested:
davinci_all_defconfig: dm355, dm6446, dm6467 EVMs
da8xx_omapl_defconfig: da830, da850 EVMs
Kevin
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From: Miguel Aguilar miguel.agui...@ridgerun.com
This driver features:
* Alarm support.
* Periodic interrupt by using a timer include into the RTC module.
* The update interrupt is not supported by this RTC module.
This driver was tested on a DM365 EVM by using the rtc-test application
from the
From: Miguel Aguilar miguel.agui...@ridgerun.com
The general structures are defined at DM365 SoC file and the specific
platform data structure for the EVM is defined at board file.
Signed-off-by: Miguel Aguilar miguel.agui...@ridgerun.com
---
arch/arm/mach-davinci/board-dm365-evm.c|4
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