TI CG Tool v6.1.5

2008-09-22 Thread Kumar Brajbhushan
All, I hope this is the right forum to ask queries on TI Code Generation tool chain. In the latest CG tool v6.1.5, new options are added like "Optimize for Speed" -mf [0-5]. Is there a document to describe these options in detail? Best Regards, Kumar > -Original Message- > From: davin

RE: How to control memory space used for instance creation?

2008-02-08 Thread Kumar Brajbhushan
Chris, Thanks a lot! I appreciate your to the point response. It does help. I have verified, it works fine. Best Regards, Kumar -Original Message- From: Ring, Chris [mailto:[EMAIL PROTECTED] Sent: Friday, February 08, 2008 12:44 PM To: Kumar Brajbhushan; davinci-linux-open-source

How to control memory space used for instance creation?

2008-02-07 Thread Kumar Brajbhushan
Hi, We have come across instances when application integrator would like to control memory-space used for instance creation of an Algorithm. I am looking for ways application can achieve this in codec engine. For example let us assume that in a system two algorithms A1 and A2 are there and both a

RE: How to make CMEM cacheable on ARM side on DM6446?

2008-01-25 Thread Kumar Brajbhushan
Chris, Thanks for the detail you provided. They helped me understand better. Best Regards, Kumar -Original Message- From: Ring, Chris [mailto:[EMAIL PROTECTED] Sent: Thursday, January 24, 2008 11:28 PM To: Kumar Brajbhushan; davinci-linux-open-source@linux.davincidsp.com Subject: RE

RE: How to make CMEM cacheable on ARM side on DM6446?

2008-01-23 Thread Kumar Brajbhushan
CE support memory relocation? Is it > possible for application to override the memory allocated by CE for an > algorithm on ARM-side or DSP-side? Best Regards, Kumar -Original Message- From: Ring, Chris [mailto:[EMAIL PROTECTED] Sent: Thursday, January 24, 2008 11:35 AM To: Kum

RE: How to make CMEM cacheable on ARM side on DM6446?

2008-01-23 Thread Kumar Brajbhushan
you, the recently released CE 2.00 and CMEM 2.00 have some cache-able buffer support... I just want to understand your use case before making a recommendation. ] Chris > -Original Message- > From: [EMAIL PROTECTED] > [mailto:[EMAIL PROTECTED] ] On Behalf Of Kumar Brajbhushan >

How to make CMEM cacheable on ARM side on DM6446?

2008-01-23 Thread Kumar Brajbhushan
All, I am trying to profile a component on ARM side of DM6446. VISA_Create allocates memory for this component from CMEM area which is not cached on ARM side. Because of this there is huge increase in the time taken for processing. Is there a way to cache this CMEM on ARM side as well? Or to dir