On Mon, Mar 30, 2009 at 03:38:41PM +0400, Sergei Shtylyov wrote:
> David Brownell wrote:
>
>>> +u32 davinci_timer_irqs[NUM_TIMERS] = {
>
>> Isn't wanting NUM_TIMERS itself a problem? Why not just
>> pass the size of the timer address array, and then just
>> know that the IRQ array is twice as big?
On Sat, Mar 28, 2009 at 08:54:01PM -0700, David Brownell wrote:
> On Saturday 28 March 2009, Mark A. Greer wrote:
> > +u32 davinci_timer_irqs[NUM_TIMERS] = {
>
> Isn't wanting NUM_TIMERS itself a problem? Why not just
> pass the size of the timer address array, and then just
> know that the IRQ a
David Brownell wrote:
+u32 davinci_timer_irqs[NUM_TIMERS] = {
Isn't wanting NUM_TIMERS itself a problem? Why not just
pass the size of the timer address array, and then just
know that the IRQ array is twice as big?
Or better still, have a structure like:
struct timer64 {
u32 ba
On Saturday 28 March 2009, Mark A. Greer wrote:
> +u32 davinci_timer_irqs[NUM_TIMERS] = {
Isn't wanting NUM_TIMERS itself a problem? Why not just
pass the size of the timer address array, and then just
know that the IRQ array is twice as big?
___
Davi
From: Mark A. Greer
The davinci timer code currently hardcodes the timer register
base addresses, the timer irq numbers, and the timers to use
for clock events and clocksource. This won't work for some
a new SoC so put those values into the davinci_soc_info
infrastructure and set them up in the
