-source@linux.davincidsp.com
Subject: RE: DSP Cycles measurement on DM6467
On Mon, 2009-04-20 at 11:08 +0530, Balagopalakrishnan, Anand wrote:
Before accessing the TSC registers, you need to enable them by
calling:
TSC_enable();
Which timer does TSC_enable initialize? Would that interfere
-linux-open-source-boun...@linux.davincidsp.com
[mailto:davinci-linux-open-source-boun...@linux.davincidsp.com] On Behalf Of
Griffis, Brad
Sent: Friday, April 17, 2009 10:53 PM
To: Joshi, Prasad; davinci-linux-open-source@linux.davincidsp.com
Subject: RE: DSP Cycles measurement on DM6467
Prasad
Prasad,
The high resolution clock that DSP/BIOS uses on 64x+ architecture is called the
time-stamp counter (TSC), which is part of the 64x+ Megamodule. It's a 64-bit
counter consisting of two registers, TSCH and TSCL, that operate at CPU/1.
When you call CLK_gethtime it reads TSCL.
By
