Hi,
I had a quick look at the tools. They convert a floorplan description
into a bitstream and back. However for a complete workflow the
following bits are missing:
* VHDL/verilog compiler to netlist
* place and route tool to turn the netlist into a floorplan
Is this correct?
Wolfgang,
Timo,
sure I can and love to comment, thanks for asking.
The state of fpgatools is 'alpha' today, not much is working
yet. But I keep working on it every day. Xiangfu is helping me
with the Debian packaging early because in the past we learned
it sometimes takes years (yes :-)) to make it through
Xiangfu Liu xian...@sharism.cc writes:
An introduction is on TODO list. :) it will be using .c files and libfpga
for implement your design.
The author(wolfgang) is working/testing on xilinx slx9 bitstream.
I am not very familiar with FPGA concepts since I have not used them yet
so my
On 09/07/2012 10:25 PM, Timo Juhani Lindfors wrote:
Xiangfu Liu xian...@sharism.cc writes:
Description : A small independent command line FPGA utilities, no GUI.
plain C, no C++, text-based file formats. convert floorplan from/to
bitstream.
Sounds interesting but the description is bit
Package: wnpp
Severity: wishlist
Owner: Xiangfu Liu xian...@openmobilefree.net
* Package name: fpgatools
Version : 201209
Upstream Author : Wolfgang Spraul
* URL : https://github.com/Wolfgang-Spraul/fpgatools
* License : UNLICENSE
Programming Lang: C
Xiangfu Liu xian...@sharism.cc writes:
Description : A small independent command line FPGA utilities, no GUI.
plain C, no C++, text-based file formats. convert floorplan from/to
bitstream.
Sounds interesting but the description is bit generic. What does this
tool let me to do? Are there
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