This patch introduces the new "program" action type to enable flow API
support for P4-programmable devices.
In the case of P4-programmable devices, the device is initially blank.
The flow items and actions are defined by the user (outside of any
vendor control) through the P4 program, which is typ
> From: Ferruh Yigit [mailto:ferruh.yi...@amd.com]
> Sent: Friday, 15 September 2023 17.55
>
> On 9/8/2023 5:07 PM, Mykola Kostenok wrote:
> > From: Christian Koue Muf
> >
> > The NTNIC PMD does not rely on a kernel space Napatech driver,
> > thus all defines related to the register layout is par
On 8/17/2023 9:42 AM, Huisong Li wrote:
> From the first version of ptpclient, it seems that this example assume that
> the PMDs support the PTP feature and enable PTP by default. Please see
> commit ab129e9065a5 ("examples/ptpclient: add minimal PTP client")
> which are introduced in 2015.
>
> An
On 8/17/2023 9:42 AM, Huisong Li wrote:
> If a port doesn't support PTP, there is no need to keep running
> app. So this patch adds the check for PTP capability.
>
> Fixes: 7a04a4f67dca ("examples/ptpclient: enable Rx timestamp offload")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Huisong Li
> Sign
Acked-by: Abdullah Sevincer
Acked-by: Abdullah Sevincer
Acked-by: Abdullah Sevincer
Acked-by: Abdullah Sevincer
Acked-by: Abdullah Sevincer
Acked-by: Abdullah Sevincer
On 9/8/2023 5:07 PM, Mykola Kostenok wrote:
> From: Christian Koue Muf
>
> The NTNIC PMD does not rely on a kernel space Napatech driver,
> thus all defines related to the register layout is part of the PMD
> code, which will be added in later commits.
>
> Signed-off-by: Christian Koue Muf
> Re
On Fri, 15 Sep 2023 13:27:03 +0100
Bruce Richardson wrote:
> The external memory functions in DPDK allow the addition of externally
> access memory to malloc heaps, but with one major restriction - the
> memory must be allocated to an application-created heap, not one of the
> standard DPDK heaps
On Fri, 15 Sep 2023 15:54:02 +0200
Morten Brørup wrote:
> > For context, Thomas and I (and a few others) had a brief discussion
> > about this topic
> > at userspace in Dublin earlier this week. I have a bit of better
> > understanding of the
> > problem-space, and we made some progress in techn
On Thu, 14 Sep 2023 10:37:51 +0100
Bruce Richardson wrote:
> Code that the comment refers to was previously removed, but the
> comment remained.
>
> Fixes: dca926ca9faa ("event/sw: use dynamically-sized IQs")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Bruce Richardson
Acked-by: Stephen Hemminge
On Tue, 15 Aug 2023 16:50:42 +
"Zhang, Yuying" wrote:
> +Rte_flow
> +~
> +
> +PMD uses a json file to direct CPF PMD to parse rte_flow tokens into
> +low level hardware resources.
> +
> +- Required Libraries
> +
> + * json-c (version 0.14+)
> +
> +* For Ubuntu, it can be inst
On 9/15/2023 2:02 PM, David Marchand wrote:
> On Fri, Sep 15, 2023 at 12:54 PM Ferruh Yigit wrote:
>>
>> On 8/31/2023 1:31 PM, Selwin Sebastian wrote:
>>> Using root complex to identify cpu will not work for vm passthrough.
>>> CPUID is used to get family and modelid to identify cpu
>>>
>>> Fixes:
> -Original Message-
> From: David Coyle
> Sent: Thursday, September 14, 2023 4:22 PM
> To: dev@dpdk.org
> Cc: Ji, Kai ; ano...@marvell.com; O'Sullivan, Kevin
> ; Coyle, David
> Subject: [PATCH v3 0/2] crypto/scheduler: add support for DOCSIS security
> protocol
>
> This patchset adds
+Chris Brezovec, took part in the discussion in Dublin
> From: Van Haaren, Harry [mailto:harry.van.haa...@intel.com]
> Sent: Friday, 15 September 2023 14.59
>
> > From: Thomas Monjalon
> > Sent: Tuesday, September 5, 2023 4:40 PM
> >
> > Hello,
>
> Hi All,
>
> For context, Thomas and I (and a
On 9/15/2023 10:15 AM, Chaoyong He wrote:
> This patch series aims to:
> - Make the coding style satisfy with DPDK.
> - Sync the logic with kernel driver.
> - Make the sub-module more modular.
> - Extend the nfp configure BAR from 8 to 24.
>
> ---
> v3:
> * Fix one bug in the BAR find logic.
> * M
On 9/15/2023 10:15 AM, Chaoyong He wrote:
> Move the definition of data structure and macro into the implement file.
>
What is the motivation for this move, I can see same is done in multiple
other patches?
Header file is still included by .c file, what is the benefit of moving
from header to .c f
On 9/15/2023 10:15 AM, Chaoyong He wrote:
> Revise the logic, using the DPDK memory management API to replace the
> malloc()/free().
>
DPDK memory management APIs are required for datapath, where it matters
from which socket it is allocated, it is accessed a lot (datapath), or
it is shared betwee
On 9/15/2023 10:15 AM, Chaoyong He wrote:
> Follow the DPDK coding style, use the kdoc comment style.
> Also add some comment to help understand logic.
>
> Signed-off-by: Chaoyong He
> Reviewed-by: Niklas Söderlund
<...>
>
> -/*
> - * Set the model id
> - *
> - * @param cpp NFP CPP o
On 9/15/2023 10:15 AM, Chaoyong He wrote:
> Unify the type of integer variable to the DPDK prefer style.
> Also change the return type of 'nfp_eth_speed2rate()' to the
> corresponding enum, which make it more readable.
>
> Signed-off-by: Chaoyong He
> Reviewed-by: Niklas Söderlund
<...>
> @@ -
On 9/15/2023 10:15 AM, Chaoyong He wrote:
> Each parameter of function should occupy one line, and indent two TAB
> character.
>
No objection to it, but "Each parameter of function should occupy one
line" is NOT coming from DPDK coding convention, right?
If this is for driver code consistancey, th
The external memory functions in DPDK allow the addition of externally
access memory to malloc heaps, but with one major restriction - the
memory must be allocated to an application-created heap, not one of the
standard DPDK heaps for a NUMA node.
This restriction makes it difficult - if not impos
On Fri, Sep 15, 2023 at 12:54 PM Ferruh Yigit wrote:
>
> On 8/31/2023 1:31 PM, Selwin Sebastian wrote:
> > Using root complex to identify cpu will not work for vm passthrough.
> > CPUID is used to get family and modelid to identify cpu
> >
> > Fixes: b0db927b5eba ("net/axgbe: use PCI root complex
> -Original Message-
> From: Thomas Monjalon
> Sent: Tuesday, September 5, 2023 4:40 PM
> To: Van Haaren, Harry ;
> david.march...@redhat.com; Richardson, Bruce
> ; Andrew Rybchenko
> ; Chaoyong He
> ; Niklas Soderlund
>
> Cc: ferruh.yi...@amd.com; dev@dpdk.org; Tyler Retzlaff
>
> Subjec
On Thu, Sep 14, 2023 at 5:31 PM Bruce Richardson
wrote:
>
> The telemetry data tests, and the telemetry json tests execute very
> quickly, so can be added to the fast-test suite.
Indeed, they are really quick, and already part of the (fixed)
fast-tests suite :-).
Marking as rejected.
>
> Signed-
On Fri, Sep 15, 2023 at 9:58 AM David Marchand
wrote:
>
> Some tests (15 fast-tests, 2 perf tests and 7 driver tests) have been
> lost in the recent changes reworking test suites.
>
> The following method was used to identify them:
>
> $ git grep -h fast_tests.+= e0a8442ccd -- app/test/meson.build
The external memory functions in DPDK allow the addition of externally
access memory to malloc heaps, but with one major restriction - the
memory must be allocated to an application-created heap, not one of the
standard DPDK heaps for a NUMA node.
This restriction makes it difficult - if not impos
On Fri, Sep 15, 2023 at 12:52:04PM +0100, Bruce Richardson wrote:
> To help ensure that we don't have "orphaned" tests not in any test
> suites we can add the following checks:
>
> * In developer-mode builds, emit a warning for each test defined using
> REGISTER_TEST_COMMAND
> * In checkpatches,
Add a check in checkpatches.sh for the use of the old
REGISTER_TEST_COMMAND macro, which just adds a test without including it
in a test suite. Suggest to the user to add the test using the newer
macros which will include the test in a test suite.
Signed-off-by: Bruce Richardson
---
devtools/che
When doing a scan for tests to add to test suites, we can also detect
the tests which have not been added to any suite. By doing so:
a) we can emit a warning informing the developer that the test is not in
a suite (if developer mode is enabled)
b) we can still register a test for that command m
To help ensure that we don't have "orphaned" tests not in any test
suites we can add the following checks:
* In developer-mode builds, emit a warning for each test defined using
REGISTER_TEST_COMMAND
* In checkpatches, add a check to prevent the addition of new tests
using the REGISTER_TEST_CO
https://bugs.dpdk.org/show_bug.cgi?id=1289
Bug ID: 1289
Summary: rte_table: lookup functions have UB for ctz
Product: DPDK
Version: 23.11
Hardware: x86
OS: Linux
Status: UNCONFIRMED
Severity: normal
> -Original Message-
> From: Zhang, Yuying
> Sent: Friday, September 15, 2023 6:01 PM
> To: Zhang, Yuying ; dev@dpdk.org; Zhang, Qi Z
> ; Xing, Beilei ; Wu, Jingjing
>
> Cc: Liu, Mingxia
> Subject: [PATCH v5 4/9] net/cpfl: add FXP low level implementation
>
> From: Yuying Zhang
>
>
> -Original Message-
> From: Zhang, Yuying
> Sent: Friday, September 15, 2023 6:01 PM
> To: Zhang, Yuying ; dev@dpdk.org; Zhang, Qi Z
> ; Xing, Beilei ; Wu, Jingjing
>
> Cc: Liu, Mingxia ; Qiao, Wenjing
>
> Subject: [PATCH v5 1/9] net/cpfl: add json parser for rte flow pattern rules
>
I'm resigning as NFP maintainer as I'm leaving Corigine. Update the
MAINTAINERS file to reflect this.
Signed-off-by: Niklas Söderlund
---
MAINTAINERS | 1 -
1 file changed, 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 698608cdb26a..308bcc175786 100644
--- a/MAINTAINERS
+++ b/MAINT
On 8/31/2023 1:31 PM, Selwin Sebastian wrote:
> Using root complex to identify cpu will not work for vm passthrough.
> CPUID is used to get family and modelid to identify cpu
>
> Fixes: b0db927b5eba ("net/axgbe: use PCI root complex device to distinguish
> device")
> Cc: sta...@dpdk.org
>
> Sign
> -Original Message-
> From: David Coyle
> Sent: Thursday, September 14, 2023 4:22 PM
> To: dev@dpdk.org
> Cc: Ji, Kai ; ano...@marvell.com; O'Sullivan, Kevin
> ; Coyle, David
> Subject: [PATCH v3 0/2] crypto/scheduler: add support for DOCSIS security
> protocol
>
> This patchset adds
Sync the logic from kernel driver, adjust the definition of structure,
and extend the usage of nfp BAR from 8 to 24.
This will greatly enhance the scalability of nfp PMD.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfp_ethdev.c | 8 +-
drivers/net/n
Sync the logic from kernel driver, use the new entry function from the
PCIe module instead of the cppcore module.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfp_ethdev.c | 9 +-
drivers/net/nfp/nfpcore/nfp6000_pcie.c | 197 ++---
Sync the logic from kernel driver and remove the unneeded header
file include statements.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp6000_pcie.c | 211 +
drivers/net/nfp/nfpcore/nfp_cpp.h | 9 ++
2 files changed, 150 in
Modify the comment and standard the coding style.
Move the definition of data structure into the implement file to make
the API small.
Also sync the logic from kernel driver and remove the unneeded header
file include statements.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
driv
Add a new header file for the PCIe module.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/meson.build | 2 +-
.../nfpcore/{nfp_cpp_pcie_ops.c => nfp6000_pcie.c} | 2 ++
drivers/net/nfp/nfpcore/nfp6000_pcie.h | 13
Add the nfp_dev module to simplify the logic.
The data structure we import can gather and replace several macro
which scatter everywhere. Which also make the logic of choose value
for different devices unnecessary and so eliminate such logic.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderl
Rename the data fields to sync with the logic in kernel driver.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/flower/nfp_flower.c | 6 +++---
drivers/net/nfp/nfp_common.h| 4 ++--
drivers/net/nfp/nfp_ethdev.c| 16
3 files changed
Add a header file to holds the API declarations of this module.
Also sync the logic from kernel driver and remove the unneeded header
file include statements.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_cpp.h | 16 --
drivers/net/nfp/nfpcore/nf
Move the definition of data structure into the implement file.
Also sync the logic from kernel driver and remove the unneeded header
file include statements.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfp_ethdev.c | 2 +-
drivers/net/nfp/nfpcore/nfp
Split out the macro which are not easily find a DPDK substitute into
a new header file.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_nsp.c | 1 +
drivers/net/nfp/nfpcore/nfp_nsp.h | 23 --
drivers/net/nfp/nfpcore/nfp_nsp_eth.c
Move the function declaration into the header file, and sync some
logic from kernel driver.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp6000/nfp6000.h | 20
drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 1 +
drivers/net/nfp/nfpco
Sync the logic from kernel driver and remove the unneeded header
file include statements.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_resource.c | 21 -
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/net/nf
Add several read/write APIs and remove the unneeded header file
include statements.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_rtsym.c | 305 +---
drivers/net/nfp/nfpcore/nfp_rtsym.h | 53 ++---
2 files changed, 299 insertio
Remove the unneeded header file include statements.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_mip.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/net/nfp/nfpcore/nfp_mip.c
b/drivers/net/nfp/nfpcore/nfp_mip.c
inde
Move the definition of data structure and macro into the implement file.
Also sync the logic from kernel driver and remove the unneeded header file
include statements.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_mip.h | 4 +-
drivers/net/nfp/nfpco
Move the definition of data structure and macro into the implement file.
Also remove the unneeded header file include statements.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_hwinfo.c | 84 +---
drivers/net/nfp/nfpcore/nfp_hwin
Rename some parameter and variable to make the logic easier to
understand.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_cpp.h | 10 ++---
drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 42 -
drivers/net/nfp/nfpcore/nfp_cppcore.c
Unify the guide line of header file, we choose '__FOO_BAR_H__' style.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_cpp.h | 2 +-
drivers/net/nfp/nfpcore/nfp_hwinfo.h | 2 +-
drivers/net/nfp/nfpcore/nfp_mip.h | 2 +-
drivers/net/nfp/nfpcore
Use space character to align instead of TAB character.
There should one blank line to split the block of logic, no more no less.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp6000/nfp6000.h | 4 +-
drivers/net/nfp/nfpcore/nfp_cpp.h | 18 +--
Follow the DPDK coding style, use the kdoc comment style.
Also add some comment to help understand logic.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_cpp.h | 504 -
drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 39 +-
dri
Revise the logic, using the DPDK memory management API to replace the
malloc()/free().
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/flower/nfp_flower.c| 2 +-
drivers/net/nfp/nfp_ethdev.c | 8
drivers/net/nfp/nfpcore/nfp_cppcore.c | 10 +
Add log statement to the important control logic, which means
more strict check of the return value of function call.
Also remove some verbose info log statement.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 37 ++
There should only declare one local variable in each line, and the local
variable should be arranged from short to long in the function.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 58 --
drivers/net/nfp/nfpcore/n
Remove the unneeded logic.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_cpp.h | 107
drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 12 -
drivers/net/nfp/nfpcore/nfp_cppcore.c | 162 --
drivers/net/nfp/nfpcore/nfp_mutex.c
Unify the type of integer variable to the DPDK prefer style.
Also change the return type of 'nfp_eth_speed2rate()' to the
corresponding enum, which make it more readable.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_cpp.h | 53 ++-
Each parameter of function should occupy one line, and indent two TAB
character.
All the statement which span multi line should indent two TAB character.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_cpp.h | 80 +-
drivers/net/nfp/nfp
To compliance with the coding standard, make the pointer variable
explicitly comparing to 'NULL' and the integer variable explicitly
comparing to '0'.
Signed-off-by: Chaoyong He
Reviewed-by: Niklas Söderlund
---
drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 12 ++--
drivers/net/nfp/nfpco
This patch series aims to:
- Make the coding style satisfy with DPDK.
- Sync the logic with kernel driver.
- Make the sub-module more modular.
- Extend the nfp configure BAR from 8 to 24.
---
v3:
* Fix one bug in the BAR find logic.
* Modify more coding style.
v2:
* Fix the compile error in Fodora
> -Original Message-
> From: Guo, Junfeng
> Sent: Friday, September 15, 2023 3:08 PM
> To: Wu, Jingjing
> Cc: dev@dpdk.org; Guo, Junfeng
> Subject: [PATCH] raw/ntb: add support for 5th and 6th Gen Intel Xeon
>
> Add support for 5th and 6th Gen Intel Xeon Scalable processors. Note
> th
From: Yuying Zhang
Fix the incorrect ingress packet number calculation.
Fixes: e3289d8fb63f ("net/cpfl: support basic statistics")
Signed-off-by: Yuying Zhang
---
drivers/net/cpfl/cpfl_ethdev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/cpfl/cpfl_ethdev.c
From: Yuying Zhang
Refine vxlan encap content of all protocol headers.
Fixes: 1960be7d32f8 ("app/testpmd: add VXLAN encap/decap")
Cc: sta...@dpdk.org
Signed-off-by: Yuying Zhang
---
app/test-pmd/cmdline_flow.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/a
From: Yuying Zhang
Add flow support for representor, so representor can
create, destroy, validate and flush rules.
Signed-off-by: Yuying Zhang
---
doc/guides/nics/cpfl.rst| 13
doc/guides/rel_notes/release_23_11.rst | 1 +
drivers/net/cpfl/cpfl_flow_engine_fxp.c | 90 +++
From: Yuying Zhang
Adapt fxp low level as a flow engine.
Signed-off-by: Yuying Zhang
---
drivers/net/cpfl/cpfl_ethdev.h | 27 ++
drivers/net/cpfl/cpfl_flow_engine_fxp.c | 583
drivers/net/cpfl/meson.build| 1 +
3 files changed, 611 insertions(+)
From: Yuying Zhang
Added low level fxp module for rule packing / creation / destroying.
Signed-off-by: Yuying Zhang
---
drivers/net/cpfl/cpfl_controlq.c | 424 +++
drivers/net/cpfl/cpfl_controlq.h | 24 ++
drivers/net/cpfl/cpfl_ethdev.c | 31 +++
drivers/net/cpf
From: Yuying Zhang
Add FXP low level implementation for CPFL rte_flow to
create/delete rules as well as setup the control vport
and control queue.
Signed-off-by: Yuying Zhang
---
drivers/net/cpfl/cpfl_actions.h | 858 +++
drivers/net/cpfl/cpfl_controlq.c | 379
From: Yuying Zhang
Set up the rte_flow backend skeleton. Introduce the framework
to support different engines as rte_flow backend. Bridge rte_flow
driver API to flow engines.
Signed-off-by: Yuying Zhang
---
drivers/net/cpfl/cpfl_ethdev.c | 53 ++
drivers/net/cpfl/cpfl_ethdev.h | 5 +
dr
From: Wenjing Qiao
Add json parser support for rte flow modification rules.
Signed-off-by: Wenjing Qiao
---
drivers/net/cpfl/cpfl_flow_parser.c | 534 +++-
drivers/net/cpfl/cpfl_flow_parser.h | 100 ++
2 files changed, 633 insertions(+), 1 deletion(-)
diff --git a/
From: Wenjing Qiao
Add devargs "flow_parser" for rte flow json parser which
depends on json-c library.
Example:
-a ca:00.0,flow_parser="refpkg.json"
Add json parser for rte flow pattern rules.The cpfl
PMD supports utilizing a JSON config file to translate
rte flow tokens into low level hard
From: Yuying Zhang
This patchset add rte flow support for cpfl driver.
It depends on the following patch set:
http://patchwork.dpdk.org/project/dpdk/cover/20230912173039.1612287-1-beilei.x...@intel.com/
Wenjing Qiao (2):
net/cpfl: add json parser for rte flow pattern rules
net/cpfl: add mod
Hi Anatoly,
Could you please review and provide suggestions if any.
Thanks,
Mingjin
> -Original Message-
> From: Ling, WeiX
> Sent: Tuesday, September 12, 2023 5:08 PM
> To: Ye, MingjinX ; dev@dpdk.org
> Cc: Yang, Qiming ; Zhou, YidingX
> ; Ye, MingjinX ;
> sta...@dpdk.org; Burakov, Ana
From: Yuying Zhang
Fix the incorrect ingress packet number calculation.
Fixes: e3289d8fb63f ("net/cpfl: support basic statistics")
Signed-off-by: Yuying Zhang
---
drivers/net/cpfl/cpfl_ethdev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/cpfl/cpfl_ethdev.c
From: Yuying Zhang
Refine vxlan encap content of all protocol headers.
Fixes: 1960be7d32f8 ("app/testpmd: add VXLAN encap/decap")
Cc: sta...@dpdk.org
Signed-off-by: Yuying Zhang
---
app/test-pmd/cmdline_flow.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/a
From: Yuying Zhang
Add flow support for representor, so representor can
create, destroy, validate and flush rules.
Signed-off-by: Yuying Zhang
---
doc/guides/nics/cpfl.rst| 13
doc/guides/rel_notes/release_23_11.rst | 1 +
drivers/net/cpfl/cpfl_flow_engine_fxp.c | 90 +++
From: Yuying Zhang
Adapt fxp low level as a flow engine.
Signed-off-by: Yuying Zhang
---
drivers/net/cpfl/cpfl_ethdev.h | 27 ++
drivers/net/cpfl/cpfl_flow_engine_fxp.c | 583
drivers/net/cpfl/meson.build| 1 +
3 files changed, 611 insertions(+)
From: Yuying Zhang
Added low level fxp module for rule packing / creation / destroying.
Signed-off-by: Yuying Zhang
---
drivers/net/cpfl/cpfl_controlq.c | 424 +++
drivers/net/cpfl/cpfl_controlq.h | 24 ++
drivers/net/cpfl/cpfl_ethdev.c | 31 +++
drivers/net/cpf
From: Yuying Zhang
Set up the rte_flow backend skeleton. Introduce the framework
to support different engines as rte_flow backend. Bridge rte_flow
driver API to flow engines.
Signed-off-by: Yuying Zhang
---
drivers/net/cpfl/cpfl_ethdev.c | 53 ++
drivers/net/cpfl/cpfl_ethdev.h | 5 +
dr
From: Yuying Zhang
Add FXP low level implementation for CPFL rte_flow to
create/delete rules as well as setup the control vport
and control queue.
Signed-off-by: Yuying Zhang
---
drivers/net/cpfl/cpfl_actions.h | 858 +++
drivers/net/cpfl/cpfl_controlq.c | 379
From: Wenjing Qiao
Add json parser support for rte flow modification rules.
Signed-off-by: Wenjing Qiao
---
drivers/net/cpfl/cpfl_flow_parser.c | 534 +++-
drivers/net/cpfl/cpfl_flow_parser.h | 100 ++
2 files changed, 633 insertions(+), 1 deletion(-)
diff --git a/
From: Wenjing Qiao
Add devargs "flow_parser" for rte flow json parser which
depends on json-c library.
Example:
-a ca:00.0,flow_parser="refpkg.json"
Add json parser for rte flow pattern rules.The cpfl
PMD supports utilizing a JSON config file to translate
rte flow tokens into low level hard
From: Yuying Zhang
This patchset add rte flow support for cpfl driver.
It depends on the following patch set:
http://patchwork.dpdk.org/project/dpdk/cover/20230912173039.1612287-1-beilei.x...@intel.com/
Wenjing Qiao (2):
net/cpfl: add json parser for rte flow pattern rules
net/cpfl: add mod
> From: Bruce Richardson [mailto:bruce.richard...@intel.com]
> Sent: Friday, 15 September 2023 10.24
>
> On Fri, Sep 15, 2023 at 09:58:01AM +0200, David Marchand wrote:
> > Some tests (15 fast-tests, 2 perf tests and 7 driver tests) have been
> > lost in the recent changes reworking test suites.
>
On Fri, Sep 15, 2023 at 09:58:01AM +0200, David Marchand wrote:
> Some tests (15 fast-tests, 2 perf tests and 7 driver tests) have been
> lost in the recent changes reworking test suites.
>
Thanks for the cleanup David.
Acked-by: Bruce Richardson
On Fri, Sep 15, 2023 at 09:55:49AM +0200, David Marchand wrote:
> Hello Bruce,
>
> On Thu, Sep 14, 2023 at 6:16 PM Bruce Richardson
> wrote:
> >
> > Hi all,
> >
> > As part of the recent rework of the build of our unit test binary
> > (dpdk-test), the individual autotests were updated in the sour
Some tests (15 fast-tests, 2 perf tests and 7 driver tests) have been
lost in the recent changes reworking test suites.
The following method was used to identify them:
$ git grep -h fast_tests.+= e0a8442ccd -- app/test/meson.build
fast_tests += [['graph_autotest', true, true]]
fast_tests
Hello Bruce,
On Thu, Sep 14, 2023 at 6:16 PM Bruce Richardson
wrote:
>
> Hi all,
>
> As part of the recent rework of the build of our unit test binary
> (dpdk-test), the individual autotests were updated in the source code to
> specify the test suite they belong to. The replacement of the
> regis
Add support for 5th and 6th Gen Intel Xeon Scalable processors. Note
that NTB devices within the 3rd, 4th and 5th Gen Intel Xeon Scalable
processors share the same device id, and compliant to PCIe 4.0 spec.
And the NTB devices within 6th Gen Intel Xeon compliant to PCIe 5.0.
Signed-off-by: Junfeng
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