From: Dylan Schneider
Allow the user to specify protocol link type when creating pcapng files.
This change is needed to specify the protocol type in the pcapng file,
DLT_EN10MB specifies ethernet packets only. This will allow dissectors
for other protocols to be used on files generated by pcapng.
compress/zlib: support PDCP checksum
compress/zlib: support zlib dictionary
compressdev: add PDCP checksum
compressdev: support zlib dictionary
Adds support to provide predefined dictionaries to zlib. Handles setting
and getting of dictionaries using zlib apis. Also includes support to
read dic
On Fri, May 16, 2025 at 4:26 PM Nicholas Pratte wrote:
>
> Introduce some additional documentation explaing the per test suite
> configuration component of DTS as the current dts documentation does
> not provide a quick access reference guide or explanation.
>
> Signed-off-by: Nicholas Pratte
ex
Add QinQ strip and VLAN extend methods to TestPmdShell class.
Signed-off-by: Dean Marx
---
dts/framework/remote_session/testpmd_shell.py | 52 +++
1 file changed, 52 insertions(+)
diff --git a/dts/framework/remote_session/testpmd_shell.py
b/dts/framework/remote_session/testpmd_
Add QinQ test suite, which verifies PMD behavior when
sending QinQ (IEEE 802.1ad) packets.
Signed-off-by: Dean Marx
---
dts/tests/TestSuite_qinq.py | 240
1 file changed, 240 insertions(+)
create mode 100644 dts/tests/TestSuite_qinq.py
diff --git a/dts/test
Hi all,
This patch series introduces a new functional test suite for
verifying QinQ (802.1ad) behavior across Poll Mode Drivers in DPDK.
While existing VLAN test coverage in DTS
includes basic single VLAN and dual VLAN tagging scenarios,
it does not specifically validate QinQ encapsulation,
which
Added functional unit test case for verifying feature arc control plane
and fast path APIs
How to run:
$ echo "graph_feature_arc_autotest" | ./bin/dpdk-test
Signed-off-by: Nitin Saxena
---
app/test/meson.build |1 +
app/test/test_graph_feature_arc.c | 1374 +
- Added cmdline argument "--enable-graph-feature-arc" to call
rte_graph_feature_arc_init() before rte_graph_create() which creates
in-built arcs and feature nodes
- Added custom feature nodes in app/graph which are added to ip4 output
arc.
- Custom features can be enabled/disabled at runtime
This patch also adds feature arc fast path APIs as well along with
documentation
Signed-off-by: Nitin Saxena
---
doc/guides/prog_guide/graph_lib.rst | 180 ++
lib/graph/graph_feature_arc.c| 717 ++-
lib/graph/meson.build| 2 +-
lib/g
- Added ip4 output arc to allow applications to hook feature nodes in ip4
egress direction
- Added interface_tx node as end feature to ip4 output arc
Signed-off-by: Nitin Saxena
---
doc/guides/rel_notes/release_25_07.rst | 2 +
lib/node/ethdev_ctrl.c | 8 +
lib/node/interface
This patch adds feature arc init()/create()/destroy() APIs. It also add
APIs for adding feature node to an arc.
Signed-off-by: Nitin Saxena
---
doc/api/doxy-api-index.md|3 +-
doc/guides/prog_guide/graph_lib.rst | 25 +-
lib/graph/graph_feature_arc.c| 1327
This patch defines RTE_GRAPH_FEATURE_ARC_REGISTER() and
RTE_GRAPH_FEATURE_REGISTER() constructors and associated APIs with
programming guide.
Signed-off-by: Nitin Saxena
---
doc/api/doxy-api-index.md | 3 +-
doc/guides/prog_guide/graph_lib.rst | 291 +++
doc/g
New internal API used by feature arc library to override node's original
process() func.
Signed-off-by: Nitin Saxena
---
lib/graph/graph_private.h | 11 +++
lib/graph/node.c | 22 ++
2 files changed, 33 insertions(+)
diff --git a/lib/graph/graph_private.h b/
Feature arc represents an ordered list of features/protocols at a given
networking layer. It is a high level abstraction to express relationship
between rte_graph nodes, as feature nodes, and allow packets steering
across these nodes in a simplified manner.
Features (or feature nodes) are nodes wh
Anatoly,
I noticed you are consolidating the Intel NIC drivers into common code, which
is good.
While you are at it, please also consider replacing some ancient code with
functions doing the same:
https://git.dpdk.org/dpdk/tree/drivers/net/intel/common/tx.h#n157
Something like (untested):
sta
+TO: David and Thomas, were part of the discussion
+CC: Stephen
> From: Andre Muezerie [mailto:andre...@linux.microsoft.com]
> Sent: Thursday, 5 June 2025 16.47
>
> __builtin_add_overflow is gcc specific. A macro needs to be defined
> for code using this to be compiled with MSVC.
> Since only one
On Thu, 5 Jun 2025 17:01:51 +0530
wrote:
> From: Sunil Kumar Kori
>
> As a port can be configured at one of the supported speed
> which can be part of specific link mode.
>
> Port type helps to translate speed into the respective mode.
>
> Hence add support to provide link type as part of lin
On Thu, Jun 5, 2025 at 1:50 PM David Marchand wrote:
>
> On Thu, Jun 5, 2025 at 1:36 PM Eugenio Pérez wrote:
> >
> > QEMU's shadow virtqueue and VDUSE exposes these areas as read-only. If
> > we don't change it, vhost_iova_to_vva do not consider them as valid and
> > returns that they're not foun
__builtin_add_overflow is gcc specific. A macro needs to be defined
for code using this to be compiled with MSVC.
Since only one driver is using this, this patch adds the macro to
that driver only. It can be moved to some common place if/when
needed.
Signed-off-by: Andre Muezerie
Acked-by: Bruce
__builtin_add_overflow is gcc specific. A macro needs to be defined
for code using this to be compiled with MSVC.
Since only one driver is using this, this patch adds the macro to
that driver only. It can be moved to some common place if/when
needed.
v6:
- Moved definition of __builtin_add_overflo
> -Original Message-
> From: Bruce Richardson
> Sent: Thursday, June 5, 2025 2:51 AM
> To: Wathsala Wathawana Vithanage
> Cc: Chenbo Xia ; Nipun Gupta ;
> Anatoly Burakov ; Gaetan Rivet ;
> dev@dpdk.org; nd ; Honnappa Nagarahalli
> ; Dhruv Tripathi
> Subject: Re: [PATCH v5 2/4] bus/pc
> On Mon, Jun 02, 2025 at 10:38:03PM +, Wathsala Vithanage wrote:
> > Extend the ethdev library to enable the stashing of different data
> > objects, such as the ones listed below, into CPU caches directly from
> > the NIC.
> >
> > - Rx/Tx queue descriptors
> > - Rx packets
> > - Packet headers
> -Original Message-
> From: Bruce Richardson
> Sent: Thursday, June 5, 2025 5:19 AM
> To: Wathsala Wathawana Vithanage
> Cc: Chenbo Xia ; Nipun Gupta ;
> Anatoly Burakov ; Gaetan Rivet ;
> dev@dpdk.org; nd ; Honnappa Nagarahalli
> ; Dhruv Tripathi
> Subject: Re: [PATCH v5 2/4] bus/pc
https://bugs.dpdk.org/show_bug.cgi?id=1719
Bug ID: 1719
Summary: mlx5 PMD returns incorrect max_mtu and max_rx_pktlen
from rte_eth_dev_info_get()
Product: DPDK
Version: 24.11
Hardware: All
OS: All
Acked-by: Kai Ji
From: Nicolau, Radu
Sent: 03 June 2025 11:30
To: Ji, Kai
Cc: dev@dpdk.org ; Nicolau, Radu
Subject: [PATCH v2] crypto/qat: remove ZUC 256 support
Remove ZUC 256 support from Gen 3 and 5 hardware
Signed-off-by: Radu Nicolau
---
v2: removed usn
Thank you for the detailed explanation, I've updated it in v4.
-原始邮件-
发件人:"Medvedkin, Vladimir"
发送时间:2025-06-05 01:03:30 (星期四)
收件人: 孙越池 , dev@dpdk.org
抄送:
主题: Re: [PATCH 2/3] lib/lpm: R-V V rte_lpm_lookupx4
Hi Sunyuechi,
On 04/06/2025 12:39, 孙越池 wrote:
> why is it done in a scala
From: Sunil Kumar Kori
Reports link mode whether fixed or autonegotiation
Depends-on: patch-35378 ("ethdev: add support to provide link type")
Signed-off-by: Nithin Dabilpuram
Signed-off-by: Sunil Kumar Kori
---
drivers/net/cnxk/cnxk_link.c | 4 ++--
1 file changed, 2 insertions(+), 2 deleti
From: Sunil Kumar Kori
Retrieves type of port i.e. twisted pair, fibre etc
from firmware and reports the same to user.
Signed-off-by: Nithin Dabilpuram
Signed-off-by: Sunil Kumar Kori
---
drivers/net/cnxk/cnxk_ethdev.c | 19 +++
drivers/net/cnxk/cnxk_ethdev.h | 1 +
drivers/n
On Thu, Jun 5, 2025 at 1:36 PM Eugenio Pérez wrote:
>
> QEMU's shadow virtqueue and VDUSE exposes these areas as read-only. If
> we don't change it, vhost_iova_to_vva do not consider them as valid and
> returns that they're not found.
>
> Eugenio Pérez (2):
> vhost: search the split vq desc and
From: Sunil Kumar Kori
Currently speed capability is hardcoded to support defined
modes and speeds but MAC can support others modes and speed
too. This information is populated by firmware.
Hence fetching firmware data to provide actual supported
modes and speeds by the port.
Signed-off-by: Nit
From: Sunil Kumar Kori
As a port can be configured to operate on specific
mode and speed via struct rte_eth_conf::link_speeds
in rte_eth_dev_configure() API.
Implement mentioned configuration passed by user.
Signed-off-by: Sunil Kumar Kori
Signed-off-by: Nithin Dabilpuram
---
drivers/net/cnx
From: Sunil Kumar Kori
CGX MAC can be configured into different modes and speeds
as mentioned below:
- fixed/autoneg
- half/full duplex
- 10M/100M/1G/10G etc speeds.
Sync mailbox and implement that to configure above mentioned
settings.
Signed-off-by: Sunil Kumar Kori
Signed-off-by: Nithin
From: Sunil Kumar Kori
Retrieves type of port from firmware data.
Signed-off-by: Nithin Dabilpuram
Signed-off-by: Sunil Kumar Kori
---
drivers/common/cnxk/hw/nix.h | 12
drivers/common/cnxk/roc_mbox.h| 13 +++--
drivers/common/cnxk/roc_nix.h | 1 +
drivers/c
QEMU's shadow virtqueue and VDUSE exposes these areas as read-only. If
we don't change it, vhost_iova_to_vva do not consider them as valid and
returns that they're not found.
Fixes: eefac9536a90 ("vhost: postpone device creation until rings are mapped")
Cc: sta...@dpdk.org
Signed-off-by: Eugenio
QEMU's shadow virtqueue and VDUSE exposes this as read-only. If we
don't change it, vhost_iova_to_vva do not consider them as valid and
returns that they're not found.
Fixes: 2d1541e2b6b3 ("vhost: add vring address setup for packed queues")
Cc: sta...@dpdk.org
Signed-off-by: Eugenio Pérez
---
l
QEMU's shadow virtqueue and VDUSE exposes these areas as read-only. If
we don't change it, vhost_iova_to_vva do not consider them as valid and
returns that they're not found.
Eugenio Pérez (2):
vhost: search the split vq desc and avail in RO areas
vhost: search the packed vq driver area in RO
By the standard this is the number of bytes written.
Fixes: 474f4d7840ad ("vhost: add control virtqueue")
Cc: sta...@dpdk.org
Signed-off-by: Eugenio Pérez
---
lib/vhost/virtio_net_ctrl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/vhost/virtio_net_ctrl.c b/lib/vhost/
From: Sunil Kumar Kori
As a port can be configured at one of the supported speed
which can be part of specific link mode.
Port type helps to translate speed into the respective mode.
Hence add support to provide link type as part of link
status if available from ethdev driver.
Signed-off-by: N
From: Sun Yuechi
The initialization of vtbl_entry is not fully vectorized here because
doing so would require __riscv_vluxei32_v_u32m1, which is slower
than the scalar approach in this small-scale scenario.
- Test: app/test/lpm_perf_autotest
- Platform: Banana Pi(BPI-F3)
- SoC: Spacemit X60 (8 c
From: Sun Yuechi
This patch series adds support for the RISC-V Vector (V) extension and
provides an optimized implementation of `rte_lpm_lookupx4` using RVV.
- Test: app/test/lpm_perf_autotest
- Platform: Banana Pi BPI-F3
- SoC: Spacemit X60 (8 cores with Vector extension)
- CPU Frequency: up t
From: Sun Yuechi
Support using -Dcpu_instruction_set=rv64gcv to enable V extension.
Signed-off-by: Sun Yuechi
---
config/riscv/meson.build | 2 ++
1 file changed, 2 insertions(+)
diff --git a/config/riscv/meson.build b/config/riscv/meson.build
index e3694cf2e6..1036a86d05 100644
--- a/config/
From: Sun Yuechi
This patch is derived from "config/riscv: detect presence of Zbc
extension with modifications".
The RISC-V C api defines architecture extension test macros
These let us detect whether the V extension is supported on the
compiler and -march we're building with. The C api also def
On Mon, Jun 02, 2025 at 10:38:02PM +, Wathsala Vithanage wrote:
> Extend the PCI bus driver to enable or disable TPH capability and set or
> get PCI Steering-Tags (STs) on an endpoint device. The functions
> rte_pci_tph_{enable, disable,st_set,st_get} provide the primary
> interface for DPDK de
From: Sunil Kumar Kori
Currently speed capability is hardcoded to support defined
modes and speeds but MAC can support others modes and speed
too. This information is populated by firmware.
Hence fetching firmware data to provide actual supported
modes and speeds by the port.
Signed-off-by: Nit
On Wed, Jun 04, 2025 at 10:52:24PM +, Wathsala Wathawana Vithanage
wrote:
> > > rte_pci_tph_st_{get, set} functions will return an error if
> > > processing any of the rte_tph_info objects fails. The API does not
> > > indicate which entry in the rte_tph_info array was executed
> > > successful
> From: Burakov, Anatoly [mailto:anatoly.bura...@intel.com]
> Sent: Thursday, 5 June 2025 11.29
>
> On 6/4/2025 4:59 PM, Bruce Richardson wrote:
> > On Fri, May 30, 2025 at 02:57:19PM +0100, Anatoly Burakov wrote:
> >> Currently, for 32-byte descriptor format, only SSE instruction set
> is
> >> su
Set the flag nt_rule to be FALSE whenever the flow rule is created
through template API. This would ensure that this flow is always
treated as template API flow after mlx5_ipool_malloc without being
zeroing via memset.
Otherwise, some tables or template actions may be still in use for
port init st
On Mon, Jun 02, 2025 at 10:38:03PM +, Wathsala Vithanage wrote:
> Extend the ethdev library to enable the stashing of different data
> objects, such as the ones listed below, into CPU caches directly
> from the NIC.
>
> - Rx/Tx queue descriptors
> - Rx packets
> - Packet headers
> - packet pay
From: Sunil Kumar Kori
As a port can be configured to operate on specific
mode and speed via struct rte_eth_conf::link_speeds
in rte_eth_dev_configure() API.
Implement mentioned configuration passed by user.
Signed-off-by: Sunil Kumar Kori
Signed-off-by: Nithin Dabilpuram
---
drivers/net/cnx
On Thu, Jun 05, 2025 at 11:29:11AM +0200, Burakov, Anatoly wrote:
> On 6/4/2025 4:59 PM, Bruce Richardson wrote:
> > On Fri, May 30, 2025 at 02:57:19PM +0100, Anatoly Burakov wrote:
> > > Currently, for 32-byte descriptor format, only SSE instruction set is
> > > supported. Add implementation for A
On 6/4/2025 4:59 PM, Bruce Richardson wrote:
On Fri, May 30, 2025 at 02:57:19PM +0100, Anatoly Burakov wrote:
Currently, for 32-byte descriptor format, only SSE instruction set is
supported. Add implementation for AVX2 and AVX512 instruction sets. Since
we are using Rx descriptor definitions fro
On 6/4/2025 11:40 AM, Bruce Richardson wrote:
On Fri, May 30, 2025 at 02:57:18PM +0100, Anatoly Burakov wrote:
The ixgbe driver has implementations of vectorized mbuf rearm code that
is identical to the ones in the common code, so just use those.
Since ixgbe Rx descriptors are always 16-byte wi
From: Sunil Kumar Kori
Reports link mode whether fixed or autonegotiation
Signed-off-by: Nithin Dabilpuram
Signed-off-by: Sunil Kumar Kori
---
drivers/net/cnxk/cnxk_link.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/cnxk/cnxk_link.c b/drivers/net/cnxk/c
This patch enables support for RSA decrypt and verify operations
and added cipher and sign test vectors.
v2:
* Added macro for buffer size
* Fixed RSA sign buffer corruption
Signed-off-by: Sucharitha Sarananaga
---
app/test-crypto-perf/cperf_ops.c | 28 +-
app/test-crypto-perf/cperf_o
From: Sunil Kumar Kori
Retrieves type of port i.e. twisted pair, fibre etc
from firmware and reports the same to user.
Signed-off-by: Nithin Dabilpuram
Signed-off-by: Sunil Kumar Kori
---
drivers/net/cnxk/cnxk_ethdev.c | 19 +++
drivers/net/cnxk/cnxk_ethdev.h | 1 +
drivers/n
From: Sunil Kumar Kori
Retrieves type of port from firmware data.
Signed-off-by: Nithin Dabilpuram
Signed-off-by: Sunil Kumar Kori
---
drivers/common/cnxk/hw/nix.h | 12
drivers/common/cnxk/roc_mbox.h| 13 +++--
drivers/common/cnxk/roc_nix.h | 1 +
drivers/c
From: Sunil Kumar Kori
Add support to provide link type as part of link status
if available from ethdev driver.
Signed-off-by: Nithin Dabilpuram
Signed-off-by: Sunil Kumar Kori
---
lib/ethdev/ethdev_trace.h| 7 +
lib/ethdev/ethdev_trace_points.c | 3 +++
lib/ethdev/rte_ethdev.c
From: Sunil Kumar Kori
CGX MAC can be configured into different modes and speeds
as mentioned below:
- fixed/autoneg
- half/full duplex
- 10M/100M/1G/10G etc speeds.
Sync mailbox and implement that to configure above mentioned
settings.
Signed-off-by: Sunil Kumar Kori
Signed-off-by: Nithin
On Wed, Jun 04, 2025 at 08:18:58AM -0700, Andre Muezerie wrote:
> On Wed, Jun 04, 2025 at 09:42:31AM +0200, Dariusz Sosnowski wrote:
> > Hi,
> >
> > On Tue, Jun 03, 2025 at 06:41:24PM +0200, Dariusz Sosnowski wrote:
> > > Hi,
> > >
> > > On Tue, May 27, 2025 at 04:41:25PM -0700, Andre Muezerie wr
On Thu, Jun 05, 2025 at 10:33:54AM +0200, Dariusz Sosnowski wrote:
> Hi,
>
> On Wed, Jun 04, 2025 at 07:15:25AM -0700, Andre Muezerie wrote:
> > When compiling with MSVC the errors below are hit because msvc does not
> > support inline assembly:
> >
> > 1)
> > ../drivers/common/mlx5/mlx5_common.c
Hi,
On Wed, Jun 04, 2025 at 07:15:25AM -0700, Andre Muezerie wrote:
> When compiling with MSVC the errors below are hit because msvc does not
> support inline assembly:
>
> 1)
> ../drivers/common/mlx5/mlx5_common.c(86): warning C4013: '__asm__'
> undefined; assuming extern returning int
> ../
On Wed, Jun 04, 2025 at 10:52:24PM +, Wathsala Wathawana Vithanage wrote:
> > > rte_pci_tph_st_{get, set} functions will return an error if processing
> > > any of the rte_tph_info objects fails. The API does not indicate which
> > > entry in the rte_tph_info array was executed successfully and
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