> -Original Message-
> From: Tal Shnaiderman
> Sent: Wednesday, July 21, 2021 11:40 AM
> To: Suanming Mou ; Slava Ovsiienko
> ; Matan Azrad ; Odi Assli
>
> Cc: Raslan Darawsheh ; dev@dpdk.org
> Subject: RE: [PATCH] net/mlx5: fix indexed pools allocate on Window
xed_ordering_read =
> config->hca_attr.relaxed_ordering_read;
> }
> + config->hw_csum = config->hca_attr.csum_cap;
> + DRV_LOG(DEBUG, "checksum offloading is %ssupported",
> + (config->hw_csum ? "" : "not "));
> }
> if (config->devx) {
> uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
> --
> 2.16.1.windows.4
Tested-by: Odi Assli
wqe_vlan_insert:1;
> + uint32_t csum_cap:1;
> uint32_t wqe_inline_mode:2;
> uint32_t vport_inline_mode:3;
> uint32_t tunnel_stateless_geneve_rx:1;
> --
> 2.16.1.windows.4
Tested-by: Odi Assli
nfig->hw_padding) {
> DRV_LOG(DEBUG, "Rx end alignment padding isn't
> supported");
> config->hw_padding = 0;
> }
> - config->tso = (sh->device_attr.max_tso > 0 &&
> - (sh->device_attr.tso_supported_qpts &
> -(1 << IBV_QPT_RAW_PACKET)));
> if (config->tso)
> config->tso_max_payload_sz = sh->device_attr.max_tso;
> DRV_LOG(DEBUG, "%sMPS is %s.",
> --
> 2.16.1.windows.4
Tested-by: Odi Assli
> Subject: Re: [PATCH v3 0/3] AVX512 vPMD on i40e
>
> External email: Use caution opening links or attachments
>
>
> On 1/18/2021 1:58 PM, Rong, Leyi wrote:
> >
> >> -Original Message-
> >> From: Odi Assli
> >> Sent: Sunday, January
> > Subject: [PATCH v3 0/3] AVX512 vPMD on i40e
> >
> > This patchset aims to support AVX512 vPMD on i40e.
> > And the changes are only target to AVX512 vector path.
> >
> > ---
> > v3:
> > - Extract get_avx_supported() to get the proper vector data path to
> choose.
> >
> > v2:
> > - Add return va
t; This error fails the probe process for the PCIe device.
> this commit will ignore such failure and will set the numa_node to 0.
>
> Fixes: b762221ac24f ("bus/pci: support Windows with bifurcated drivers")
> Cc: sta...@dpdk.org
>
> Reported-by: Odi Assli
> Sign
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