From: Kalesh AP <kalesh-anakkur.pura...@broadcom.com>
The "active_fec_signal_mode" in HWRM_PORT_PHY_QCFG response is uint8_t.
So no need of endianness conversion while parsing response.
Also, signal_mode is the first 4bits of "active_fec_signal_mode".
Fixes: c23f9ded0391 ("net/bnxt: support 200G PAM4 link")
Cc: sta...@dpdk.org
Signed-off-by: Kalesh AP <kalesh-anakkur.pura...@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khapa...@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.ko...@broadcom.com>
---
drivers/net/bnxt/bnxt_hwrm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index 178a112..d87f0c3 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -1506,7 +1506,7 @@ static int bnxt_hwrm_port_phy_qcfg(struct bnxt *bp,
link_info->phy_ver[1] = resp->phy_min;
link_info->phy_ver[2] = resp->phy_bld;
link_info->link_signal_mode =
- rte_le_to_cpu_16(resp->active_fec_signal_mode);
+ resp->active_fec_signal_mode &
HWRM_PORT_PHY_QCFG_OUTPUT_SIGNAL_MODE_MASK;
link_info->force_pam4_link_speed =
rte_le_to_cpu_16(resp->force_pam4_link_speed);
link_info->support_pam4_speeds =
--
2.10.1
