These fields don't need to be set in the hot path.
This improves performance.

Signed-off-by: Andrew Boyer <andrew.bo...@amd.com>
---
 drivers/net/ionic/ionic_rxtx.c | 38 ++++++++++++++++++++++++++++++----
 1 file changed, 34 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index 0c1cc842cf..2a34465e46 100644
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -941,9 +941,6 @@ ionic_rx_fill(struct ionic_rx_qcq *rxq)
                desc = &desc_base[q->head_idx];
                dma_addr = rte_cpu_to_le_64(rte_mbuf_data_iova_default(rxm));
                desc->addr = dma_addr;
-               desc->len = rxq->hdr_seg_size;
-               desc->opcode = (q->num_segs > 1) ? IONIC_RXQ_DESC_OPCODE_SG :
-                       IONIC_RXQ_DESC_OPCODE_SIMPLE;
                rxm->next = NULL;
 
                prev_rxm_seg = rxm;
@@ -963,7 +960,6 @@ ionic_rx_fill(struct ionic_rx_qcq *rxq)
                        data_iova = rte_mbuf_data_iova(rxm_seg);
                        dma_addr = rte_cpu_to_le_64(data_iova);
                        elem->addr = dma_addr;
-                       elem->len = rxq->seg_size;
                        elem++;
 
                        rxm_seg->next = NULL;
@@ -981,6 +977,38 @@ ionic_rx_fill(struct ionic_rx_qcq *rxq)
        return 0;
 }
 
+/*
+ * Perform one-time initialization of descriptor fields
+ * which will not change for the life of the queue.
+ */
+static void __rte_cold
+ionic_rx_init_descriptors(struct ionic_rx_qcq *rxq)
+{
+       struct ionic_queue *q = &rxq->qcq.q;
+       struct ionic_rxq_desc *desc, *desc_base = q->base;
+       struct ionic_rxq_sg_desc *sg_desc, *sg_desc_base = q->sg_base;
+       uint32_t i, j;
+       uint8_t opcode;
+
+       opcode = (q->num_segs > 1) ?
+               IONIC_RXQ_DESC_OPCODE_SG : IONIC_RXQ_DESC_OPCODE_SIMPLE;
+
+       /*
+        * NB: Only the first segment needs to leave headroom (hdr_seg_size).
+        *     Later segments (seg_size) do not.
+        */
+       for (i = 0; i < q->num_descs; i++) {
+               desc = &desc_base[i];
+               desc->len = rte_cpu_to_le_16(rxq->hdr_seg_size);
+               desc->opcode = opcode;
+
+               sg_desc = &sg_desc_base[i];
+               for (j = 0; j < q->num_segs - 1u; j++)
+                       sg_desc->elems[j].len =
+                               rte_cpu_to_le_16(rxq->seg_size);
+       }
+}
+
 /*
  * Start Receive Units for specified queue.
  */
@@ -1010,6 +1038,8 @@ ionic_dev_rx_queue_start(struct rte_eth_dev *eth_dev, 
uint16_t rx_queue_id)
        IONIC_PRINT(DEBUG, "Starting RX queue %u, %u descs, size %u segs %u",
                rx_queue_id, q->num_descs, rxq->frame_size, q->num_segs);
 
+       ionic_rx_init_descriptors(rxq);
+
        err = ionic_lif_rxq_init(rxq);
        if (err)
                return err;
-- 
2.17.1

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