A new devarg is added to configure force tail drop.
Also, CQ descriptors are doubled under this option.
To enable this devarg, it needs to be pass as
force_tail_drop=1 for nix device.
e.g.: 0002:02:00.0,force_tail_drop=1
Signed-off-by: Rahul Bhansali <rbhans...@marvell.com>
---
drivers/net/cnxk/cnxk_ethdev.c | 4 ++++
drivers/net/cnxk/cnxk_ethdev_devargs.c | 7 ++++++-
drivers/net/cnxk/cnxk_ethdev_ops.c | 2 ++
3 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index b9a0b37425..1ba09c068b 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -708,6 +708,10 @@ cnxk_nix_rx_queue_setup(struct rte_eth_dev *eth_dev,
uint16_t qid,
if (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY)
nb_desc = nix_inl_cq_sz_clamp_up(nix, lpb_pool, nb_desc);
+ /* Double the CQ descriptors */
+ if (nix->force_tail_drop)
+ nb_desc = 2 * RTE_MAX(nb_desc, (uint32_t)4096);
+
/* Setup ROC CQ */
cq = &dev->cqs[qid];
cq->qid = qid;
diff --git a/drivers/net/cnxk/cnxk_ethdev_devargs.c
b/drivers/net/cnxk/cnxk_ethdev_devargs.c
index aa2fe7dfe1..7013849ad3 100644
--- a/drivers/net/cnxk/cnxk_ethdev_devargs.c
+++ b/drivers/net/cnxk/cnxk_ethdev_devargs.c
@@ -281,6 +281,7 @@ parse_val_u16(const char *key, const char *value, void
*extra_args)
#define CNXK_NIX_RX_INJ_ENABLE "rx_inj_ena"
#define CNXK_CUSTOM_META_AURA_DIS "custom_meta_aura_dis"
#define CNXK_CUSTOM_INB_SA "custom_inb_sa"
+#define CNXK_FORCE_TAIL_DROP "force_tail_drop"
int
cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev
*dev)
@@ -301,6 +302,7 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs,
struct cnxk_eth_dev *dev)
uint16_t outb_nb_desc = 8200;
struct sdp_channel sdp_chan;
uint16_t rss_tag_as_xor = 0;
+ uint8_t force_tail_drop = 0;
uint16_t scalar_enable = 0;
uint16_t tx_compl_ena = 0;
uint16_t custom_sa_act = 0;
@@ -364,6 +366,7 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs,
struct cnxk_eth_dev *dev)
rte_kvargs_process(kvlist, CNXK_CUSTOM_META_AURA_DIS, &parse_flag,
&custom_meta_aura_dis);
rte_kvargs_process(kvlist, CNXK_CUSTOM_INB_SA, &parse_flag,
&custom_inb_sa);
+ rte_kvargs_process(kvlist, CNXK_FORCE_TAIL_DROP, &parse_flag,
&force_tail_drop);
rte_kvargs_free(kvlist);
null_devargs:
@@ -405,6 +408,7 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs,
struct cnxk_eth_dev *dev)
dev->npc.flow_age.aging_poll_freq = aging_thread_poll_freq;
if (roc_feature_nix_has_rx_inject())
dev->nix.rx_inj_ena = rx_inj_ena;
+ dev->nix.force_tail_drop = force_tail_drop;
return 0;
exit:
return -EINVAL;
@@ -429,4 +433,5 @@ RTE_PMD_REGISTER_PARAM_STRING(net_cnxk,
CNXK_SQB_SLACK "=<12-512>"
CNXK_FLOW_AGING_POLL_FREQ "=<10-65535>"
CNXK_NIX_RX_INJ_ENABLE "=1"
- CNXK_CUSTOM_META_AURA_DIS "=1");
+ CNXK_CUSTOM_META_AURA_DIS "=1"
+ CNXK_FORCE_TAIL_DROP "=1");
diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c
b/drivers/net/cnxk/cnxk_ethdev_ops.c
index 9970c5ff5c..7c8a4d8416 100644
--- a/drivers/net/cnxk/cnxk_ethdev_ops.c
+++ b/drivers/net/cnxk/cnxk_ethdev_ops.c
@@ -313,6 +313,7 @@ cnxk_nix_flow_ctrl_set(struct rte_eth_dev *eth_dev,
fc_cfg.rq_cfg.pool = rq->aura_handle;
fc_cfg.rq_cfg.spb_pool = rq->spb_aura_handle;
fc_cfg.rq_cfg.cq_drop = cq->drop_thresh;
+ fc_cfg.rq_cfg.cq_bp = cq->bp_thresh;
fc_cfg.rq_cfg.pool_drop_pct = ROC_NIX_AURA_THRESH;
rc = roc_nix_fc_config_set(nix, &fc_cfg);
@@ -1239,6 +1240,7 @@ nix_priority_flow_ctrl_rq_conf(struct rte_eth_dev
*eth_dev, uint16_t qid,
fc_cfg.rq_cfg.pool = rxq->qconf.mp->pool_id;
fc_cfg.rq_cfg.spb_pool = rq->spb_aura_handle;
fc_cfg.rq_cfg.cq_drop = cq->drop_thresh;
+ fc_cfg.rq_cfg.cq_bp = cq->bp_thresh;
fc_cfg.rq_cfg.pool_drop_pct = ROC_NIX_AURA_THRESH;
rc = roc_nix_fc_config_set(nix, &fc_cfg);
if (rc)
--
2.25.1
