On Mon, Apr 04, 2016 at 03:57:11PM -0700, Rich Lane wrote:
> On Mon, Apr 4, 2016 at 1:05 PM, Yuanhan Liu
> wrote:
>
> On Mon, Apr 04, 2016 at 03:13:37PM +0200, Thomas Monjalon wrote:
> > Huawei, Yuanhan, any comment?
> >
> > 2016-03-31 13:01, Rich Lane:
> > >? ? ? ? ? ? ? ? ?
On Mon, Apr 04, 2016 at 03:13:37PM +0200, Thomas Monjalon wrote:
> Huawei, Yuanhan, any comment?
>
> 2016-03-31 13:01, Rich Lane:
> > vq->vq_ring.desc[i + mid_idx].next = i;
> > vq->vq_ring.desc[i + mid_idx].addr =
> > -
On Mon, Apr 4, 2016 at 1:05 PM, Yuanhan Liu
wrote:
> On Mon, Apr 04, 2016 at 03:13:37PM +0200, Thomas Monjalon wrote:
> > Huawei, Yuanhan, any comment?
> >
> > 2016-03-31 13:01, Rich Lane:
> > > vq->vq_ring.desc[i + mid_idx].next = i;
> > >
Huawei, Yuanhan, any comment?
2016-03-31 13:01, Rich Lane:
> vq->vq_ring.desc[i + mid_idx].next = i;
> vq->vq_ring.desc[i + mid_idx].addr =
> - vq->virtio_net_hdr_mem +
> -
For simple TX the virtio-net header must be zeroed, but it was using memory
that had been initialized with indirect descriptor tables. This resulted in
"unsupported gso type" errors from librte_vhost.
We can use the same memory for every descriptor to save cachelines in the
vswitch.
Signed-off-by
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