This patch adds architecture specific memory barrier operations for
TileGx.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_atomic.h | 62 ++
1 file changed, 62 insertions(+)
create mode 100644 lib/librte_eal/common/i
On 12/8/2014 6:28 AM, Neil Horman wrote:
> On Mon, Dec 08, 2014 at 04:59:25PM +0800, Zhigang Lu wrote:
>> This patch adds architecture specific memory barrier operations for
>> TileGx.
>>
>> Signed-off-by: Zhigang Lu
>> Signed-off-by: Cyril Chemparathy
>> ---
[...]
>> +__sync_synchronize();
>
On Mon, Dec 08, 2014 at 04:59:25PM +0800, Zhigang Lu wrote:
> This patch adds architecture specific memory barrier operations for
> TileGx.
>
> Signed-off-by: Zhigang Lu
> Signed-off-by: Cyril Chemparathy
> ---
> .../common/include/arch/tile/rte_atomic.h | 62
> ++
3 matches
Mail list logo