It adds code style fixes.

Signed-off-by: Helin Zhang <helin.zhang at intel.com>
---
 drivers/net/i40e/base/i40e_adminq.c     | 52 +++++++++++++++++++--------------
 drivers/net/i40e/base/i40e_adminq.h     |  4 +--
 drivers/net/i40e/base/i40e_adminq_cmd.h | 21 +++++++------
 drivers/net/i40e/base/i40e_common.c     |  5 ++--
 drivers/net/i40e/base/i40e_prototype.h  |  3 +-
 5 files changed, 48 insertions(+), 37 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_adminq.c 
b/drivers/net/i40e/base/i40e_adminq.c
index ba7ef42..0d3a83f 100644
--- a/drivers/net/i40e/base/i40e_adminq.c
+++ b/drivers/net/i40e/base/i40e_adminq.c
@@ -572,6 +572,26 @@ shutdown_arq_out:
        i40e_release_spinlock(&hw->aq.arq_spinlock);
        return ret_code;
 }
+#ifdef PF_DRIVER
+
+/**
+ *  i40e_resume_aq - resume AQ processing from 0
+ *  @hw: pointer to the hardware structure
+ **/
+STATIC void i40e_resume_aq(struct i40e_hw *hw)
+{
+       /* Registers are reset after PF reset */
+       hw->aq.asq.next_to_use = 0;
+       hw->aq.asq.next_to_clean = 0;
+
+       i40e_config_asq_regs(hw);
+
+       hw->aq.arq.next_to_use = 0;
+       hw->aq.arq.next_to_clean = 0;
+
+       i40e_config_arq_regs(hw);
+}
+#endif /* PF_DRIVER */

 /**
  *  i40e_init_adminq - main initialization routine for Admin Queue
@@ -586,12 +606,15 @@ shutdown_arq_out:
  **/
 enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw)
 {
-       enum i40e_status_code ret_code;
 #ifdef PF_DRIVER
-       u16 eetrack_lo, eetrack_hi;
        u16 cfg_ptr, oem_hi, oem_lo;
+       u16 eetrack_lo, eetrack_hi;
+#endif
+       enum i40e_status_code ret_code;
+#ifdef PF_DRIVER
        int retry = 0;
 #endif
+
        /* verify input for valid configuration */
        if ((hw->aq.num_arq_entries == 0) ||
            (hw->aq.num_asq_entries == 0) ||
@@ -600,8 +623,6 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw)
                ret_code = I40E_ERR_CONFIG;
                goto init_adminq_exit;
        }
-
-       /* initialize spin locks */
        i40e_init_spinlock(&hw->aq.asq_spinlock);
        i40e_init_spinlock(&hw->aq.arq_spinlock);

@@ -704,8 +725,6 @@ enum i40e_status_code i40e_shutdown_adminq(struct i40e_hw 
*hw)

        i40e_shutdown_asq(hw);
        i40e_shutdown_arq(hw);
-
-       /* destroy the spinlocks */
        i40e_destroy_spinlock(&hw->aq.asq_spinlock);
        i40e_destroy_spinlock(&hw->aq.arq_spinlock);

@@ -731,7 +750,6 @@ u16 i40e_clean_asq(struct i40e_hw *hw)

        desc = I40E_ADMINQ_DESC(*asq, ntc);
        details = I40E_ADMINQ_DETAILS(*asq, ntc);
-
        while (rd32(hw, hw->aq.asq.head) != ntc) {
                i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
                           "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head));
@@ -764,7 +782,11 @@ u16 i40e_clean_asq(struct i40e_hw *hw)
  *  Returns true if the firmware has processed all descriptors on the
  *  admin send queue. Returns false if there are still requests pending.
  **/
+#ifdef VF_DRIVER
 bool i40e_asq_done(struct i40e_hw *hw)
+#else
+STATIC bool i40e_asq_done(struct i40e_hw *hw)
+#endif
 {
        /* AQ designers suggest use of head for better
         * timing reliability than DD bit
@@ -922,7 +944,6 @@ enum i40e_status_code i40e_asq_send_command(struct i40e_hw 
*hw,
                         */
                        if (i40e_asq_done(hw))
                                break;
-                       /* ugh! delay while spin_lock */
                        i40e_msec_delay(1);
                        total_delay++;
                } while (total_delay < hw->aq.asq_cmd_timeout);
@@ -1105,7 +1126,7 @@ enum i40e_status_code i40e_clean_arq_element(struct 
i40e_hw *hw,

 #ifdef PF_DRIVER
        i40e_nvmupd_check_wait_event(hw, LE16_TO_CPU(e->desc.opcode));
-#endif
+#endif /* PF_DRIVER */
 clean_arq_element_out:
        /* Set pending if needed, unlock and return */
        if (pending != NULL)
@@ -1116,16 +1137,3 @@ clean_arq_element_err:
        return ret_code;
 }

-void i40e_resume_aq(struct i40e_hw *hw)
-{
-       /* Registers are reset after PF reset */
-       hw->aq.asq.next_to_use = 0;
-       hw->aq.asq.next_to_clean = 0;
-
-       i40e_config_asq_regs(hw);
-
-       hw->aq.arq.next_to_use = 0;
-       hw->aq.arq.next_to_clean = 0;
-
-       i40e_config_arq_regs(hw);
-}
diff --git a/drivers/net/i40e/base/i40e_adminq.h 
b/drivers/net/i40e/base/i40e_adminq.h
index 29c04a3..750973c 100644
--- a/drivers/net/i40e/base/i40e_adminq.h
+++ b/drivers/net/i40e/base/i40e_adminq.h
@@ -157,8 +157,8 @@ STATIC INLINE int i40e_aq_rc_to_posix(int aq_ret, int aq_rc)
 }

 /* general information */
-#define I40E_AQ_LARGE_BUF              512
-#define I40E_ASQ_CMD_TIMEOUT           250  /* msecs */
+#define I40E_AQ_LARGE_BUF      512
+#define I40E_ASQ_CMD_TIMEOUT   250  /* msecs */
 #ifdef I40E_ESS_SUPPORT
 #define I40E_ASQ_CMD_TIMEOUT_ESS       50000  /* msecs */
 #endif
diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h 
b/drivers/net/i40e/base/i40e_adminq_cmd.h
index 58ba609..687eaa5 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -927,7 +927,7 @@ struct i40e_aqc_vsi_properties_data {
        u8      up_enable_bits;
        u8      sched_reserved;
        /* outer up section */
-       __le32  outer_up_table; /* same structure and defines as ingress table 
*/
+       __le32  outer_up_table; /* same structure and defines as ingress tbl */
        u8      cmd_reserved[8];
        /* last 32 bytes are written by FW */
        __le16  qs_handle[8];
@@ -1567,7 +1567,8 @@ struct 
i40e_aqc_configure_switching_comp_ets_bw_limit_data {
        u8      reserved1[28];
 };

-I40E_CHECK_STRUCT_LEN(0x40, 
i40e_aqc_configure_switching_comp_ets_bw_limit_data);
+I40E_CHECK_STRUCT_LEN(0x40,
+                     i40e_aqc_configure_switching_comp_ets_bw_limit_data);

 /* Configure Switching Component Bandwidth Allocation per Tc
  * (indirect 0x0417)
@@ -1941,7 +1942,7 @@ struct i40e_aqc_nvm_config_read {
 #define I40E_AQ_ANVM_READ_SINGLE_FEATURE               0
 #define I40E_AQ_ANVM_READ_MULTIPLE_FEATURES            1
        __le16  element_count;
-       __le16  element_id;     /* Feature/field ID */
+       __le16  element_id;     /* Feature/field ID */
        __le16  element_id_msw; /* MSWord of field ID */
        __le32  address_high;
        __le32  address_low;
@@ -1962,9 +1963,10 @@ I40E_CHECK_CMD_LENGTH(i40e_aqc_nvm_config_write);

 /* Used for 0x0704 as well as for 0x0705 commands */
 #define I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_SHIFT                1
-#define I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_MASK         (1 << 
I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_SHIFT)
-#define I40E_AQ_ANVM_FEATURE                           0
-#define I40E_AQ_ANVM_IMMEDIATE_FIELD                   (1 << 
FEATURE_OR_IMMEDIATE_SHIFT)
+#define I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_MASK \
+                               (1 << I40E_AQ_ANVM_FEATURE_OR_IMMEDIATE_SHIFT)
+#define I40E_AQ_ANVM_FEATURE           0
+#define I40E_AQ_ANVM_IMMEDIATE_FIELD   (1 << FEATURE_OR_IMMEDIATE_SHIFT)
 struct i40e_aqc_nvm_config_data_feature {
        __le16 feature_id;
 #define I40E_AQ_ANVM_FEATURE_OPTION_OEM_ONLY           0x01
@@ -1988,7 +1990,7 @@ I40E_CHECK_STRUCT_LEN(0xc, 
i40e_aqc_nvm_config_data_immediate_field);
 /* OEM Post Update (indirect 0x0720)
  * no command data struct used
  */
- struct i40e_aqc_nvm_oem_post_update {
+struct i40e_aqc_nvm_oem_post_update {
 #define I40E_AQ_NVM_OEM_POST_UPDATE_EXTERNAL_DATA      0x01
        u8 sel_data;
        u8 reserved[7];
@@ -2278,7 +2280,8 @@ I40E_CHECK_STRUCT_LEN(0x10, 
i40e_aqc_lldp_set_local_mib_resp);
  */
 struct i40e_aqc_lldp_stop_start_specific_agent {
 #define I40E_AQC_START_SPECIFIC_AGENT_SHIFT    0
-#define I40E_AQC_START_SPECIFIC_AGENT_MASK     (1 << 
I40E_AQC_START_SPECIFIC_AGENT_SHIFT)
+#define I40E_AQC_START_SPECIFIC_AGENT_MASK \
+                               (1 << I40E_AQC_START_SPECIFIC_AGENT_SHIFT)
        u8      command;
        u8      reserved[15];
 };
@@ -2300,7 +2303,7 @@ struct i40e_aqc_add_udp_tunnel {
 I40E_CHECK_CMD_LENGTH(i40e_aqc_add_udp_tunnel);

 struct i40e_aqc_add_udp_tunnel_completion {
-       __le16 udp_port;
+       __le16  udp_port;
        u8      filter_entry_index;
        u8      multiple_pfs;
 #define I40E_AQC_SINGLE_PF             0x0
diff --git a/drivers/net/i40e/base/i40e_common.c 
b/drivers/net/i40e/base/i40e_common.c
index 7a5f754..f7dff12 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -1317,8 +1317,7 @@ enum i40e_status_code i40e_pf_reset(struct i40e_hw *hw)
                        I40E_GLGEN_RSTCTL_GRSTDEL_MASK) >>
                        I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;

-       /* It can take upto 15 secs for GRST steady state */
-       grst_del = grst_del * 20; /* bump it to 16 secs max to be safe */
+       grst_del = grst_del * 20;

        for (cnt = 0; cnt < grst_del; cnt++) {
                reg = rd32(hw, I40E_GLGEN_RSTAT);
@@ -4425,7 +4424,7 @@ enum i40e_status_code i40e_aq_delete_element(struct 
i40e_hw *hw, u16 seid,
 }

 /**
- * i40_aq_add_pvirt - Instantiate a Port Virtualizer on a port
+ * i40e_aq_add_pvirt - Instantiate a Port Virtualizer on a port
  * @hw: pointer to the hw struct
  * @flags: component flags
  * @mac_seid: uplink seid (MAC SEID)
diff --git a/drivers/net/i40e/base/i40e_prototype.h 
b/drivers/net/i40e/base/i40e_prototype.h
index f93b530..48a08fd 100644
--- a/drivers/net/i40e/base/i40e_prototype.h
+++ b/drivers/net/i40e/base/i40e_prototype.h
@@ -67,14 +67,15 @@ enum i40e_status_code i40e_asq_send_command(struct i40e_hw 
*hw,
                                void *buff, /* can be NULL */
                                u16  buff_size,
                                struct i40e_asq_cmd_details *cmd_details);
+#ifdef VF_DRIVER
 bool i40e_asq_done(struct i40e_hw *hw);
+#endif

 /* debug function for adminq */
 void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask,
                   void *desc, void *buffer, u16 buf_len);

 void i40e_idle_aq(struct i40e_hw *hw);
-void i40e_resume_aq(struct i40e_hw *hw);
 bool i40e_check_asq_alive(struct i40e_hw *hw);
 enum i40e_status_code i40e_aq_queue_shutdown(struct i40e_hw *hw, bool 
unloading);
 #ifdef X722_SUPPORT
-- 
2.5.0

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