There are some Client PHY Ultra Low Power (ULP) register bits
that are configured by the Manageability Engine (ME) FW.
The driver must ensure that these bits are cleared on exit
from ULP. Ordinarily the ME FW would do that, but there are
cases in which the FW is not present, and the driver must
handle that.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu at intel.com>
---
drivers/net/e1000/base/e1000_ich8lan.c | 2 ++
drivers/net/e1000/base/e1000_ich8lan.h | 4 ++++
2 files changed, 6 insertions(+)
diff --git a/drivers/net/e1000/base/e1000_ich8lan.c
b/drivers/net/e1000/base/e1000_ich8lan.c
index 4d893d2..212526f 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -1343,6 +1343,8 @@ s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool
force)
I218_ULP_CONFIG1_RESET_TO_SMBUS |
I218_ULP_CONFIG1_WOL_HOST |
I218_ULP_CONFIG1_INBAND_EXIT |
+ I218_ULP_CONFIG1_EN_ULP_LANPHYPC |
+ I218_ULP_CONFIG1_DIS_CLR_STICKY_ON_PERST |
I218_ULP_CONFIG1_DISABLE_SMB_PERST);
e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);
diff --git a/drivers/net/e1000/base/e1000_ich8lan.h
b/drivers/net/e1000/base/e1000_ich8lan.h
index 6aa9288..352b959 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.h
+++ b/drivers/net/e1000/base/e1000_ich8lan.h
@@ -198,6 +198,10 @@ POSSIBILITY OF SUCH DAMAGE.
#define I218_ULP_CONFIG1_INBAND_EXIT 0x0020 /* Inband on ULP exit */
#define I218_ULP_CONFIG1_WOL_HOST 0x0040 /* WoL Host on ULP exit */
#define I218_ULP_CONFIG1_RESET_TO_SMBUS 0x0100 /* Reset to SMBus mode */
+/* enable ULP even if when phy powered down via lanphypc */
+#define I218_ULP_CONFIG1_EN_ULP_LANPHYPC 0x0400
+/* disable clear of sticky ULP on PERST */
+#define I218_ULP_CONFIG1_DIS_CLR_STICKY_ON_PERST 0x0800
#define I218_ULP_CONFIG1_DISABLE_SMB_PERST 0x1000 /* Disable on PERST# */
#endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
--
1.9.3
