> -Original Message-
> From: Honnappa Nagarahalli
> Sent: Sunday, October 13, 2019 10:32
> To: Ruifeng Wang (Arm Technology China) ;
> david.h...@intel.com
> Cc: dev@dpdk.org; hka...@marvell.com; Gavin Hu (Arm Technology China)
> ; nd ; Ruifeng Wang (Arm Technology
> China) ; sta...@dpdk
Hi Ruifeng,
Typically, we have followed the convention of adding comments whenever
C11 atomic APIs are used. Can you please add comments indicating why acquire or
release semantics are used?
> -Original Message-
> From: Ruifeng Wang
> Sent: Friday, October 11, 2019 9:44 PM
> To:
Distributor and worker threads rely on data structs in cache line
for synchronization. The shared data structs were not protected.
This caused deadlock issue on weaker memory ordering platforms as
aarch64.
Fix this issue by adding memory barriers to ensure synchronization
among cores.
Bugzilla ID:
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