Hi Tiwei,
Thanks for review.
> -Original Message-
> From: Tiwei Bie
> Sent: Friday, December 20, 2019 4:18 PM
> To: Gavin Hu
> Cc: dev@dpdk.org; nd ; david.march...@redhat.com;
> tho...@monjalon.net; rasl...@mellanox.com;
> maxime.coque...@redhat.com; hemant.agra...@nxp.com;
> jer...@ma
On Fri, Dec 20, 2019 at 11:09:50AM +0800, Gavin Hu wrote:
> Other than real PCI reads and writes to the device memory requiring
> the io barriers, virtual pci memories are normal memory in the smp
> configuration, which requires the smp barriers.
>
> Since the smp barriers and io barriers are iden
Other than real PCI reads and writes to the device memory requiring
the io barriers, virtual pci memories are normal memory in the smp
configuration, which requires the smp barriers.
Since the smp barriers and io barriers are identical on x86 and PPC,
this change has only effect on aarch64.
As fa
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