> -Original Message-
> From: Ola Liljedahl [mailto:ola.liljed...@arm.com]
> Sent: Tuesday, January 29, 2019 6:57 AM
> To: Eads, Gage ; dev@dpdk.org
> Cc: jer...@marvell.com; mcze...@marvell.com; nd ;
> Richardson, Bruce ; Ananyev, Konstantin
> ; step...@networkplumber.org;
> olivier.m...@
On Mon, 2019-01-28 at 12:14 -0600, Gage Eads wrote:
> 64-bit head and tail index widths greatly increases the time it takes for
> them to wrap-around (with current CPU speeds, it won't happen within the
> author's lifetime). This is fundamental to avoiding the ABA problem -- in
> which a thread mis
64-bit head and tail index widths greatly increases the time it takes for
them to wrap-around (with current CPU speeds, it won't happen within the
author's lifetime). This is fundamental to avoiding the ABA problem -- in
which a thread mistakes reading the same tail index in two accesses to mean
th
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