There might be a case that one Mellanox device can be probed by
multiple mlx5 drivers.
One case is that any mlx5 vDPA device can be probed by bothe net/mlx5
and vdpa/mlx5.
Add a new mlx5 common API to get the requested driver by devargs:
class=[net/vdpa].
Skip net/mlx5 PMD probing while the device is selected to be probed by
the vDPA driver.
Signed-off-by: Matan Azrad <ma...@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viachesl...@mellanox.com>
---
drivers/common/mlx5/Makefile | 2 +-
drivers/common/mlx5/meson.build | 2 +-
drivers/common/mlx5/mlx5_common.c | 36 +++++++++++++++++++++++++
drivers/common/mlx5/mlx5_common.h | 11 ++++++++
drivers/common/mlx5/rte_common_mlx5_version.map | 2 ++
drivers/net/mlx5/mlx5.c | 8 ++++++
6 files changed, 59 insertions(+), 2 deletions(-)
diff --git a/drivers/common/mlx5/Makefile b/drivers/common/mlx5/Makefile
index d1de3ec..b9e9803 100644
--- a/drivers/common/mlx5/Makefile
+++ b/drivers/common/mlx5/Makefile
@@ -41,7 +41,7 @@ else
LDLIBS += -libverbs -lmlx5
endif
-LDLIBS += -lrte_eal -lrte_pci
+LDLIBS += -lrte_eal -lrte_pci -lrte_kvargs
# A few warnings cannot be avoided in external headers.
CFLAGS += -Wno-error=cast-qual -DNDEBUG -UPEDANTIC
diff --git a/drivers/common/mlx5/meson.build b/drivers/common/mlx5/meson.build
index 3e130cb..b88822e 100644
--- a/drivers/common/mlx5/meson.build
+++ b/drivers/common/mlx5/meson.build
@@ -37,7 +37,7 @@ endforeach
if build
allow_experimental_apis = true
- deps += ['hash', 'pci', 'net', 'eal']
+ deps += ['hash', 'pci', 'net', 'eal', 'kvargs']
ext_deps += libs
sources = files(
'mlx5_devx_cmds.c',
diff --git a/drivers/common/mlx5/mlx5_common.c
b/drivers/common/mlx5/mlx5_common.c
index 2381208..52f191a 100644
--- a/drivers/common/mlx5/mlx5_common.c
+++ b/drivers/common/mlx5/mlx5_common.c
@@ -71,6 +71,42 @@
return 0;
}
+static int
+mlx5_class_check_handler(__rte_unused const char *key, const char *value,
+ void *opaque)
+{
+ enum mlx5_class *ret = opaque;
+
+ if (strcmp(value, "vdpa") == 0) {
+ *ret = MLX5_CLASS_VDPA;
+ } else if (strcmp(value, "net") == 0) {
+ *ret = MLX5_CLASS_NET;
+ } else {
+ DRV_LOG(ERR, "Invalid mlx5 class %s. Maybe typo in device"
+ " class argument setting?", value);
+ *ret = MLX5_CLASS_INVALID;
+ }
+ return 0;
+}
+
+enum mlx5_class
+mlx5_class_get(struct rte_devargs *devargs)
+{
+ struct rte_kvargs *kvlist;
+ const char *key = MLX5_CLASS_ARG_NAME;
+ enum mlx5_class ret = MLX5_CLASS_NET;
+
+ if (devargs == NULL)
+ return ret;
+ kvlist = rte_kvargs_parse(devargs->args, NULL);
+ if (kvlist == NULL)
+ return ret;
+ if (rte_kvargs_count(kvlist, key))
+ rte_kvargs_process(kvlist, key, mlx5_class_check_handler, &ret);
+ rte_kvargs_free(kvlist);
+ return ret;
+}
+
#ifdef RTE_IBVERBS_LINK_DLOPEN
/**
diff --git a/drivers/common/mlx5/mlx5_common.h
b/drivers/common/mlx5/mlx5_common.h
index 9d464d4..2988f4b 100644
--- a/drivers/common/mlx5/mlx5_common.h
+++ b/drivers/common/mlx5/mlx5_common.h
@@ -11,6 +11,8 @@
#include <rte_pci.h>
#include <rte_atomic.h>
#include <rte_log.h>
+#include <rte_kvargs.h>
+#include <rte_devargs.h>
#include "mlx5_prm.h"
@@ -150,4 +152,13 @@ enum mlx5_cqe_status {
int mlx5_dev_to_pci_addr(const char *dev_path, struct rte_pci_addr *pci_addr);
+#define MLX5_CLASS_ARG_NAME "class"
+
+enum mlx5_class {
+ MLX5_CLASS_NET,
+ MLX5_CLASS_VDPA,
+ MLX5_CLASS_INVALID,
+};
+enum mlx5_class mlx5_class_get(struct rte_devargs *devargs);
+
#endif /* RTE_PMD_MLX5_COMMON_H_ */
diff --git a/drivers/common/mlx5/rte_common_mlx5_version.map
b/drivers/common/mlx5/rte_common_mlx5_version.map
index 95ca54a..3e7038b 100644
--- a/drivers/common/mlx5/rte_common_mlx5_version.map
+++ b/drivers/common/mlx5/rte_common_mlx5_version.map
@@ -1,6 +1,8 @@
DPDK_20.02 {
global:
+ mlx5_class_get;
+
mlx5_devx_cmd_create_cq;
mlx5_devx_cmd_create_qp;
mlx5_devx_cmd_create_rq;
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index d0fa2da..ca5bc14 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1565,6 +1565,8 @@ struct mlx5_flow_id_pool *
config->max_dump_files_num = tmp;
} else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
config->lro.timeout = tmp;
+ } else if (strcmp(MLX5_CLASS_ARG_NAME, key) == 0) {
+ DRV_LOG(DEBUG, "class argument is %s.", val);
} else {
DRV_LOG(WARNING, "%s: unknown parameter", key);
rte_errno = EINVAL;
@@ -1616,6 +1618,7 @@ struct mlx5_flow_id_pool *
MLX5_REPRESENTOR,
MLX5_MAX_DUMP_FILES_NUM,
MLX5_LRO_TIMEOUT_USEC,
+ MLX5_CLASS_ARG_NAME,
NULL,
};
struct rte_kvargs *kvlist;
@@ -2967,6 +2970,11 @@ struct mlx5_flow_id_pool *
struct mlx5_dev_config dev_config;
int ret;
+ if (mlx5_class_get(pci_dev->device.devargs) != MLX5_CLASS_NET) {
+ DRV_LOG(DEBUG, "Skip probing - should be probed by other mlx5"
+ " driver.");
+ return 1;
+ }
if (rte_eal_process_type() == RTE_PROC_PRIMARY)
mlx5_pmd_socket_init();
ret = mlx5_init_once();
--
1.8.3.1
