[Public]
Hi All,
Saring `rte_topology_` API patch next version targeted for upcoming release.
Extras adding support for Cache-ID for L2 and L3 for Cache line stashing, Code
Data Prioritization too.
Snipped
>
> >
> > Hello Vipin and others,
> >
> > please, will there be any progress or update o
[AMD Official Use Only - AMD Internal Distribution Only]
Snipped
>
> Hello Vipin and others,
>
> please, will there be any progress or update on this series?
Apologies, we did a small update in slack, and missed this out here. Let me try
to address your questions below
>
> I successfully teste
Hello Vipin and others,
please, will there be any progress or update on this series?
I successfully tested those changes on our Intel and AMD machines and
would like to use it in production soon.
The API is a little bit unintuitive, at least for me, but I
successfully integrated into our softwar
On 2025-03-04 11:08, Morten Brørup wrote:
From: Varghese, Vipin [mailto:vipin.vargh...@amd.com]
Sent: Monday, 3 March 2025 10.06
[Public]
Hi Morten,
snipped
From: Thomas Monjalon [mailto:tho...@monjalon.net]
Sent: Thursday, 13 February 2025 09.34
13/02/2025 04:09, Varghese, Vipin:
[AMD O
> From: Varghese, Vipin [mailto:vipin.vargh...@amd.com]
> Sent: Monday, 3 March 2025 10.06
>
> [Public]
>
> Hi Morten,
>
> snipped
>
> >
> > > From: Thomas Monjalon [mailto:tho...@monjalon.net]
> > > Sent: Thursday, 13 February 2025 09.34
> > >
> > > 13/02/2025 04:09, Varghese, Vipin:
> > > > [
[Public]
Hi Morten,
snipped
>
>
> > From: Thomas Monjalon [mailto:tho...@monjalon.net]
> > Sent: Thursday, 13 February 2025 09.34
> >
> > 13/02/2025 04:09, Varghese, Vipin:
> > > [AMD Official Use Only - AMD Internal Distribution Only]
> > >
> > > Adding Thomas and Ajit to the loop.
> > >
> > >
[Public]
Hi Thomas
snipped
> >
> > Thomas and Ajith can we get some help to get this mainline too?
>
> Yes, sorry the review discussions did not start.
> It has been forgotten.
>
> You could rebase a v2 to make it more visible.
Sure will do this week.
>
> Minor note: the changelog should be aft
> From: Thomas Monjalon [mailto:tho...@monjalon.net]
> Sent: Thursday, 13 February 2025 09.34
>
> 13/02/2025 04:09, Varghese, Vipin:
> > [AMD Official Use Only - AMD Internal Distribution Only]
> >
> > Adding Thomas and Ajit to the loop.
> >
> > Hi Ajit, we have been using the patch series for ide
13/02/2025 04:09, Varghese, Vipin:
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> Adding Thomas and Ajit to the loop.
>
> Hi Ajit, we have been using the patch series for identifying the topology and
> getting l3 cache id for populating the steering tag for Device Specific Model
[AMD Official Use Only - AMD Internal Distribution Only]
Adding Thomas and Ajit to the loop.
Hi Ajit, we have been using the patch series for identifying the topology and
getting l3 cache id for populating the steering tag for Device Specific Model &
MSI-x driven af-xdp for the experimental STA
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