Re: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library

2018-05-10 Thread Xu, Rosen
antin > ; Zhang, Tianfei ; > Liu, Song ; Wu, Hao ; > gaetan.ri...@6wind.com > Subject: RE: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS > Library > > > > > -Original Message- > > From: Xu, Rosen > > Sent: Thursday, May 10, 2018 8:21 PM &

Re: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library

2018-05-10 Thread Wu, Jingjing
; ; Zhang, Tianfei ; > Liu, Song > ; Wu, Hao ; gaetan.ri...@6wind.com > Subject: RE: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library > > Hi Jingjing, > > > -Original Message- > > From: Wu, Jingjing > > Sent: Thursday, May 10, 2018 16:

Re: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library

2018-05-10 Thread Thomas Monjalon
10/05/2018 15:51, Xu, Rosen: > Hi Qi, > > I miss one comment, so I fix it in this email. In order to avoid missing comments, and to ease reading for others, please remove the useless context lines when replying.

Re: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library

2018-05-10 Thread Zhang, Qi Z
> ; Zhang, Tianfei ; > Liu, Song ; Wu, Hao ; > gaetan.ri...@6wind.com > Subject: RE: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library > > Hi Qi, > > > -Original Message- > > From: Zhang, Qi Z > > Sent: Thursday, May 10, 2018 21:49 >

Re: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library

2018-05-10 Thread Zhang, Qi Z
anyev, Konstantin > ; Zhang, Tianfei ; > Liu, Song ; Wu, Hao ; > gaetan.ri...@6wind.com > Subject: RE: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library > > Hi Qi, > > I miss one comment, so I fix it in this email. > > > -Original Message- > &

Re: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library

2018-05-10 Thread Xu, Rosen
antin > ; Zhang, Tianfei ; > Liu, Song ; Wu, Hao ; > gaetan.ri...@6wind.com > Subject: RE: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS > Library > > > > > -Original Message- > > From: Xu, Rosen > > Sent: Thursday, May 10, 2018 9:29 PM

Re: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library

2018-05-10 Thread Xu, Rosen
lan > ; Richardson, Bruce > ; shreyansh.j...@nxp.com; Yigit, Ferruh > ; Ananyev, Konstantin > ; Zhang, Tianfei ; > Liu, Song ; Wu, Hao ; > gaetan.ri...@6wind.com > Subject: Re: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS > Library > > Hi Qi, > > >

Re: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library

2018-05-10 Thread Zhang, Qi Z
> ; Zhang, Tianfei ; > Liu, Song ; Wu, Hao ; > gaetan.ri...@6wind.com > Subject: RE: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library > > Hi Qi, > > > -Original Message- > > From: Zhang, Qi Z > > Sent: Thursday, May 10, 2018 20:27

Re: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library

2018-05-10 Thread Xu, Rosen
ev, Konstantin > ; Zhang, Tianfei ; > Liu, Song ; Wu, Hao ; > gaetan.ri...@6wind.com > Subject: RE: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS > Library > > Hi Rosen: > > > -Original Message- > > From: dev [mailto:dev-boun...@dpdk.org] On

Re: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library

2018-05-10 Thread Zhang, Qi Z
Hi Rosen: > -Original Message- > From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Xu, Rosen > Sent: Wednesday, May 9, 2018 3:43 PM > To: dev@dpdk.org; tho...@monjalon.net > Cc: Xu, Rosen ; Zhang, Roy Fan > ; Doherty, Declan ; > Richardson, Bruce ; shreyansh.j...@nxp.com; > Yigit, Ferru

Re: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library

2018-05-10 Thread Xu, Rosen
uh ; Ananyev, Konstantin > ; Zhang, Tianfei ; > Liu, Song ; Wu, Hao ; > gaetan.ri...@6wind.com > Subject: RE: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS > Library > > Hi, Rosen > > Few comments below. Thanks a lot Jingjing. > > Thanks >

Re: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library

2018-05-10 Thread Wu, Jingjing
Hi, Rosen Few comments below. Thanks Jingjing [..] > +static struct rte_ifpga_device * > +ifpga_find_ifpga_dev(const struct rte_rawdev *rdev) > +{ > + struct rte_ifpga_device *ifpga_dev = NULL; > + > + TAILQ_FOREACH(ifpga_dev, &ifpga_device_list, next) { > + if (rdev &&