Re: [dpdk-dev] [PATCH v2] sched: fix overflow errors in WRR weighting code

Hi Cristian, Responses in-line below... > -Original Message- > From: Dumitrescu, Cristian [mailto:cristian.dumitre...@intel.com] > Sent: Tuesday, January 02, 2018 4:14 PM > To: alangordonde...@gmail.com > Cc: dev@dpdk.org; Alan Dewar > Subject: RE: [PATCH v2] sched: fix overflow errors

Re: [dpdk-dev] [PATCH v2] sched: fix overflow errors in WRR weighting code

Hi Alan, NAK for now. There is a good reason for truncating the WRR cost to 8-bit value, which is keeping the size of the rte_sched_pipe structure to single cache line (64 bytes). This is done for performance reasons at the expense of some accuracy loss for the scheduling of the 4x queues per

Re: [dpdk-dev] [PATCH v2] sched: fix overflow errors in WRR weighting code

On Thu, 2017-11-30 at 09:04 +, alangordonde...@gmail.com wrote: > From: Alan Dewar > > Revised patch - this version fixes an issue when a small wrr_cost is > shifted so far right that its value becomes zero. > > The WRR code calculates the lowest common denominator between the > four > WRR w