> -Original Message-
> From: Yongseok Koh
> Sent: Saturday, April 13, 2019 4:55 AM
> To: bruce.richard...@intel.com; Jerin Jacob Kollanukkaran
> ; Pavan Nikhilesh Bhagavatula
> ; shah...@mellanox.com
> Cc: dev@dpdk.org; tho...@monjalon.net; gavin...@arm.com;
> honnappa.nagaraha...@arm.c
Other than 1/1, I don't think, this patches series fixing any build for arm64.
It is adding features required for Mellanox BlueField support.
Please change subject to more appropriate name.
> -Original Message-
> From: Yongseok Koh
> Sent: Saturday, April 13, 2019 4:55 AM
> To: bruce.ric
> -Original Message-
> From: Yongseok Koh
> Sent: Saturday, April 13, 2019 4:55 AM
> To: bruce.richard...@intel.com; Jerin Jacob Kollanukkaran
> ; Pavan Nikhilesh Bhagavatula
> ; shah...@mellanox.com
> Cc: dev@dpdk.org; tho...@monjalon.net; gavin...@arm.com;
> honnappa.nagaraha...@arm.com
Hi Ferruh,
>> +int
>> +rte_eth_macsec_select_txsa(uint16_t port_id,
>> + uint8_t idx, uint8_t an,
>> + uint32_t pn, uint8_t *key);
>> +
>>
>> #include
>>
>
> These are new ethdev APIs, not driver code, that have been sent after rc1, so
> these did
From: Yunjian Wang
Now the macvlan filter list may be accessed in the same time by two
different threads and may cause a lot of optional errors. This patch
protects the macvlan filter access with a spinlock.
Call Trace:
#1 0x7ffb4cbe2e3c in i40e_vsi_delete_mac (vsi=vsi@entry=
0x4000
This patch implement a separate FIFO for each cpu core.
Dependency to commit: 5c7c96571b7b7051ecc286f36be0b3d95b49995e
(power: update for handling fifo path string).
Lukasz Krakowiak (2):
power: add fifo per core for JSON interface
doc: update according to the fifo per core impl
---
v2:
* re
From: Lukasz Krakowiak
This patch implement a separate FIFO for each cpu core.
For proper handling JSON interface, removed fields from cmds:
core_list, resource_id, name.
---
v2:
* updated handling vm_name (use proper buff size)
* rebase to master changes
Signed-off-by: Lukasz Krakowiak
Signed
Enable missing support for QinQ strip rx offload
in vlan offload set/get methods.
Fixes: cc9d0456b870 ("i40e: support double vlan stripping and insertion")
Cc: sta...@dpdk.org
Signed-off-by: Vivek Sharma
---
lib/librte_ethdev/rte_ethdev.c | 17 +
lib/librte_ethdev/rte_ethdev.h |
From: Lukasz Krakowiak
Updated power management docs for fifo JSON API.
Removed from JSON API:
* 'name'
* 'resource_id'
* 'core_list'
Signed-off-by: Lukasz Krakowiak
Signed-off-by: Lukasz Gosiewski
---
.../sample_app_ug/vm_power_management.rst | 53 ---
1 file changed, 11
From: Jerin Jacob
Optimized configuration for Marvell thunderx2 SoC.
Updated meson build to support Marvell thunderx2 SoC.
Added meson cross compile target.
Product details are here:
https://www.marvell.com/server-processors/thunderx2-arm-processors/
Signed-off-by: Jerin Jacob
Signed-off-by:
From: Jerin Jacob
Optimized configuration for Marvell octeontx2 SoC.
Updated meson build to support Marvell octeontx2 SoC.
Added meson cross build target for octeontx2.
Signed-off-by: Jerin Jacob
Signed-off-by: Pavan Nikhilesh
Reviewed-by: Gavin Hu
---
config/arm/arm64_octeontx2_linux_gcc
From: Pavan Nikhilesh
Currently, RTE_* flags are set based on the implementer ID but there might
be some micro arch specific differences from the same vendor
eg. CACHE_LINESIZE. Add support to set micro arch specific flags.
Signed-off-by: Pavan Nikhilesh
Signed-off-by: Jerin Jacob
---
config/
From: Jerin Jacob
Introduce rte_cc_has_argument() Makefile helper to
check a given argument is support by the compiler.
Example Usage:
include $(RTE_SDK)/mk/rte.helper.mk
MACHINE_CFLAGS += $(call rte_cc_has_argument, -mcpu=octeontx2)
This would allow adding -mcpu=octeontx2 in MACHINE_CFLAGS
if
From: Jerin Jacob
Optimized configuration for Marvell octeontx2 SoC.
Updated meson build to support Marvell octeontx2 SoC.
Added meson cross build target for octeontx2.
Signed-off-by: Jerin Jacob
Signed-off-by: Pavan Nikhilesh
Reviewed-by: Gavin Hu
---
config/arm/arm64_octeontx2_linux_gcc
From: Pavan Nikhilesh
Currently, RTE_* flags are set based on the implementer ID but there might
be some micro arch specific differences from the same vendor
eg. CACHE_LINESIZE. Add support to set micro arch specific flags.
Signed-off-by: Pavan Nikhilesh
Signed-off-by: Jerin Jacob
---
config/
From: Jerin Jacob
Introduce rte_cc_has_argument() Makefile helper to
check a given argument is support by the compiler.
Example Usage:
include $(RTE_SDK)/mk/rte.helper.mk
MACHINE_CFLAGS += $(call rte_cc_has_argument, -mcpu=octeontx2)
This would allow adding -mcpu=octeontx2 in MACHINE_CFLAGS
if
From: Jerin Jacob
Optimized configuration for Marvell thunderx2 SoC.
Updated meson build to support Marvell thunderx2 SoC.
Added meson cross compile target.
Product details are here:
https://www.marvell.com/server-processors/thunderx2-arm-processors/
Signed-off-by: Jerin Jacob
Signed-off-by:
13/04/2019 08:24, Jerin Jacob Kollanukkaran:
> > I was not confortable with this patch without being able to say why.
> > Yesterday I spent more time to understand and see what may be improved.
> > I agree it is late, so it won't block this patch for 19.05.
> > Do you agree this file can be improve
On Mon, Apr 08, 2019 at 10:04:21AM +0100, Ray Kinsella wrote:
> On 07/04/2019 10:48, Thomas Monjalon wrote:
> > 04/04/2019 16:07, Burakov, Anatoly:
> >> On 04-Apr-19 1:52 PM, Ray Kinsella wrote:
> >>> On 04/04/2019 11:54, Bruce Richardson wrote:
> On Thu, Apr 04, 2019 at 10:29:19AM +0100, Bura
From: Pavan Nikhilesh
Fix large multiple calculation in 64 bit reciprocal division.
Fixes: 6d45659eacb8 ("eal: add u64-bit variant for reciprocal divide")
Cc: sta...@dpdk.org
Reported-by: Stefan Kanthak
Signed-off-by: Pavan Nikhilesh
---
lib/librte_eal/common/rte_reciprocal.c | 76 ++
Friday, April 12, 2019 8:55 PM, Yongseok Koh:
> Subject: Re: [dpdk-stable] [PATCH 1/1] net/mlx5: fix memory region cleanup
> routine
>
>
> > On Apr 12, 2019, at 8:45 AM, Viacheslav Ovsiienko
> wrote:
> >
> > mlx5 driver has a global list of Memory Regions created by device, and
> > there is a ml
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