[PATCH 1/1] drivers/net: fix checking for Tx simple

Tx simple? Besides, I haven't seen the similar usage to check the offload for RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE. Fix it if the checking logic is wrong. Fixes: 295968d1740 ("ethdev: add namespace") Cc: sta...@dpdk.org Signed-off-by: Min Zhou --- drivers/net/hns3/hns3_rxtx.c | 2 +-

[PATCH 1/1] test/hash: fix error log output

Caught while running meson test: hash creation failedTest Failed Add missing \n. Fixes: 0eb3726ebcf ("test/hash: add test for read/write concurrency") Signed-off-by: Min Zhou --- app/test/test_hash_readwrite.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[v3 07/24] eal/loongarch: add dummy vector memcpy for LoongArch

The hardware instructions based vector implementation for memcpy will come later. At present, this dummy implementation can also work. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_memcpy.h | 193 + lib/eal/loongarch/include/rte_vect.h | 46 ++ 2 files

[v3 05/24] eal/loongarch: add spinlock operations for LoongArch

This patch adds spinlock operations for LoongArch architecture. These implementations are based on standard atomics of toolchain and heavily reference generic spinlock codes. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_spinlock.h | 90 1 file changed, 90

[v3 19/24] test/xmmt_ops: add dummy vector implementation for LoongArch

The hardware instructions based vector implementation will come in a future patch. This dummy implementation can also work. Signed-off-by: Min Zhou --- app/test/test_xmmt_ops.h | 17 + 1 file changed, 17 insertions(+) diff --git a/app/test/test_xmmt_ops.h b/app/test

[v3 21/24] i40e: add dummy vector implementation for LoongArch

The purpose of this patch is used to fix building issues for LoongArch architecture. The hardware instructions based vector implementation will come in a future patch. Signed-off-by: Min Zhou --- drivers/net/i40e/i40e_rxtx_vec_lsx.c | 54 drivers/net/i40e

[v3 13/24] eal/loongarch: add ticketlock operations for LoongArch

This patch adds ticketlock operations for LoongArch architecture. Let it uses generic ticketlock implementation. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_ticketlock.h | 18 ++ 1 file changed, 18 insertions(+) create mode 100644 lib/eal/loongarch/include

[v3 00/24] Support LoongArch architecture

scalar implementation, thanks to Michal Mazurek - modify the name of compiler for cross compiling - remove useless variable in meson.build v2: - use standard atomics of toolchain to implement atomic operations - implement spinlock based on standard atomics Min Zhou

[v3 09/24] eal/loongarch: add mcslock operations for LoongArch

This patch adds mcslock operations for LoongArch architecture. Let it uses generic mcslock implementation. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_mcslock.h | 18 ++ 1 file changed, 18 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_mcslock.h

[v3 24/24] maintainers: claim responsibility for LoongArch

This patch adds claim responsibility for LoongArch architecture. Signed-off-by: Min Zhou --- MAINTAINERS | 9 + 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index f34f6fa2e9..eb38bf473b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -269,6 +269,15 @@ F: lib/eal

[v3 14/24] eal/loongarch: add power operations for LoongArch

This patch adds power operations for LoongArch architecture. In fact, these operations are temporarily not supported on LoongArch. Signed-off-by: Min Zhou --- .../loongarch/include/rte_power_intrinsics.h | 20 lib/eal/loongarch/rte_power_intrinsics.c | 51 +++ 2

[v3 08/24] eal/loongarch: add io operations for LoongArch

This patch adds io operations for LoongArch architecture. Let it uses generic I/O implementation. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_io.h | 18 ++ 1 file changed, 18 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_io.h diff --git a/lib/eal

[v3 17/24] eal/linux: set eal base address for LoongArch

This patch sets a different eal base address for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/linux/eal_memory.c | 4 1 file changed, 4 insertions(+) diff --git a/lib/eal/linux/eal_memory.c b/lib/eal/linux/eal_memory.c index c890c42106..60fc8cc6ca 100644 --- a/lib/eal/linux

[v3 10/24] eal/loongarch: add pause operations for LoongArch

This patch adds architecture specific pause operations for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_pause.h | 24 1 file changed, 24 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_pause.h diff --git a/lib/eal

[v3 16/24] mem: add huge page size definition for LoongArch

LoongArch architecture has a different huge page size (32MB) than other architectures. This patch adds a new huge page size for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/include/rte_memory.h | 1 + lib/eal/include/rte_memzone.h | 1 + 2 files changed, 2 insertions(+) diff

[v3 04/24] eal/loongarch: add prefetch operations for LoongArch

This patch adds architecture specific prefetch operations for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_prefetch.h | 47 1 file changed, 47 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_prefetch.h diff --git a

[v3 06/24] eal/loongarch: add cpu flag checks for LoongArch

This patch uses aux vector software register to get CPU flags and add CPU flag checking support for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_cpuflags.h | 39 ++ lib/eal/loongarch/rte_cpuflags.c | 94 2 files

[v3 15/24] eal/loongarch: add hypervisor operations for LoongArch

This patch adds hypervisor operations for LoongArch architecture. In fact, these operations are currently not supported on LoongArch. Signed-off-by: Min Zhou --- lib/eal/loongarch/rte_hypervisor.c | 11 +++ 1 file changed, 11 insertions(+) create mode 100644 lib/eal/loongarch

[v3 18/24] meson: introduce LoongArch architecture

This patch adds some meson.build files for building DPDK on LoongArch architecture. Signed-off-by: Min Zhou --- .../loongarch/loongarch_loongarch64_linux_gcc | 16 +++ config/loongarch/meson.build | 43 +++ lib/eal/loongarch/include/meson.build | 21

[v3 12/24] eal/loongarch: add rwlock operations for LoongArch

This patch adds rwlock operations for LoongArch architecture. These implementations refer to rte_rwlock.h of PPC. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_rwlock.h | 42 ++ 1 file changed, 42 insertions(+) create mode 100644 lib/eal/loongarch/include

[v3 22/24] tap: add system call number for LoongArch

This patch adds system call number of bpf for LoongArch architecture. Signed-off-by: Min Zhou --- drivers/net/tap/tap_bpf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/tap/tap_bpf.h b/drivers/net/tap/tap_bpf.h index f0b9fc7a2c..b1c9600ed8 100644 --- a/drivers

[v3 02/24] eal/loongarch: add byte order operations for LoongArch

This patch adds architecture specific byte order operations for LoongArch architecture. LoongArch bit designations are always little-endian. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_byteorder.h | 46 +++ 1 file changed, 46 insertions(+) create mode 100644

[v3 20/24] ixgbe: add dummy vector implementation for LoongArch

The purpose of this patch is used to fix building issues for LoongArch architecture. The hardware instructions based vector implementation will come in a future patch. Signed-off-by: Min Zhou --- drivers/net/ixgbe/ixgbe_rxtx_vec_lsx.c | 60 ++ drivers/net/ixgbe

[v3 01/24] eal/loongarch: add atomic operations for LoongArch

This patch adds architecture specific atomic operations for LoongArch architecture. These implementations use standard atomics of toolchain and heavily reference generic atomics codes. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_atomic.h | 253 + 1 file

[v3 23/24] memif: add system call number for LoongArch

This patch adds system call number of memfd_create for LoongArch architecture. Signed-off-by: Min Zhou --- drivers/net/memif/rte_eth_memif.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/memif/rte_eth_memif.h b/drivers/net/memif/rte_eth_memif.h index

[v3 03/24] eal/loongarch: add cpu cycle operations for LoongArch

processor during the execution of the software. We can use this instruction to calculate the frequency used by the timer. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_cycles.h | 53 ++ lib/eal/loongarch/rte_cycles.c | 45 ++ 2 files

[v3 11/24] eal/loongarch: add pflock operations for LoongArch

This patch adds pflock operations for LoongArch architecture. Let it uses generic pflock implementation. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_pflock.h | 17 + 1 file changed, 17 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_pflock.h diff

[v1 03/24] eal/loongarch: add cpu cycle operations for LoongArch

processor during the execution of the software. We can use this instruction to calculate the frequency used by the timer. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_cycles.h | 53 ++ lib/eal/loongarch/rte_cycles.c | 45 ++ 2 files

[v1 02/24] eal/loongarch: add byte order operations for LoongArch

This patch adds architecture specific byte order operations for LoongArch architecture. LoongArch bit designations are always little-endian. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_byteorder.h | 46 +++ 1 file changed, 46 insertions(+) create mode 100644

[v1 00/24] Support LoongArch architecture

/LoongArch-Documentation/README-EN.html Min Zhou (24): eal/loongarch: add atomic operations for LoongArch eal/loongarch: add byte order operations for LoongArch eal/loongarch: add cpu cycle operations for LoongArch eal/loongarch: add prefetch operations for LoongArch eal/loongarch: add

[v1 01/24] eal/loongarch: add atomic operations for LoongArch

This patch adds architecture specific atomic operations for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_atomic.h | 401 + 1 file changed, 401 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_atomic.h diff --git a/lib

[v1 04/24] eal/loongarch: add prefetch operations for LoongArch

This patch adds architecture specific prefetch operations for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_prefetch.h | 47 1 file changed, 47 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_prefetch.h diff --git a

[v1 05/24] eal/loongarch: add spinlock operations for LoongArch

This patch adds spinlock operations for LoongArch architecture. These implementations refer to GLIBC pthread_spin_xxlock(). The underlying implementation is based on LoongArch atomic instructions (ie, AMSWAP_DB.W). Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_spinlock.h | 93

[v1 06/24] eal/loongarch: add cpu flag checks for LoongArch

This patch uses aux vector software register to get CPU flags and add CPU flag checking support for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_cpuflags.h | 39 ++ lib/eal/loongarch/rte_cpuflags.c | 94 2 files

[v1 08/24] eal/loongarch: add io operations for LoongArch

This patch adds io operations for LoongArch architecture. Let it uses generic I/O implementation. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_io.h | 18 ++ 1 file changed, 18 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_io.h diff --git a/lib/eal

[v1 10/24] eal/loongarch: add pause operations for LoongArch

This patch adds architecture specific pause operations for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_pause.h | 24 1 file changed, 24 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_pause.h diff --git a/lib/eal

[v1 07/24] eal/loongarch: add dummy vector memcpy for LoongArch

The hardware instructions based vector implementation for memcpy will come later. At present, this dummy implementation can also work. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_memcpy.h | 193 + lib/eal/loongarch/include/rte_vect.h | 47 ++ 2 files

[v1 12/24] eal/loongarch: add rwlock operations for LoongArch

This patch adds rwlock operations for LoongArch architecture. The implementation is based on lib/eal/ppc/include/rte_rwlock.h. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_rwlock.h | 42 ++ 1 file changed, 42 insertions(+) create mode 100644 lib/eal

[v1 13/24] eal/loongarch: add ticketlock operations for LoongArch

This patch adds ticketlock operations for LoongArch architecture. Let it uses generic ticketlock implementation. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_ticketlock.h | 18 ++ 1 file changed, 18 insertions(+) create mode 100644 lib/eal/loongarch/include

[v1 11/24] eal/loongarch: add pflock operations for LoongArch

This patch adds pflock operations for LoongArch architecture. Let it uses generic pflock implementation. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_pflock.h | 17 + 1 file changed, 17 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_pflock.h diff

[v1 09/24] eal/loongarch: add mcslock operations for LoongArch

This patch adds mcslock operations for LoongArch architecture. Let it uses generic mcslock implementation. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_mcslock.h | 18 ++ 1 file changed, 18 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_mcslock.h

[v1 14/24] eal/loongarch: add power operations for LoongArch

This patch adds power operations for LoongArch architecture. In fact, these operations are temporarily not supported on LoongArch. Signed-off-by: Min Zhou --- .../loongarch/include/rte_power_intrinsics.h | 20 lib/eal/loongarch/rte_power_intrinsics.c | 51 +++ 2

[v1 16/24] mem: add huge page size definition for LoongArch

LoongArch architecture has a different huge page size (32MB) than other architectures. This patch adds a new huge page size for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/include/rte_memory.h | 1 + lib/eal/include/rte_memzone.h | 1 + 2 files changed, 2 insertions(+) diff

[v1 15/24] eal/loongarch: add hypervisor operations for LoongArch

This patch adds hypervisor operations for LoongArch architecture. In fact, these operations are currently not supported on LoongArch. Signed-off-by: Min Zhou --- lib/eal/loongarch/rte_hypervisor.c | 11 +++ 1 file changed, 11 insertions(+) create mode 100644 lib/eal/loongarch

[v1 18/24] meson: introduce LoongArch architecture

This patch adds some meson.build files for building DPDK on LoongArch architecture. Signed-off-by: Min Zhou --- .../loongarch/loongarch_loongarch64_linux_gcc | 16 +++ config/loongarch/meson.build | 46 +++ lib/eal/loongarch/include/meson.build | 21

[v1 17/24] eal/linux: set eal base address for LoongArch

This patch sets a different eal base address for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/linux/eal_memory.c | 4 1 file changed, 4 insertions(+) diff --git a/lib/eal/linux/eal_memory.c b/lib/eal/linux/eal_memory.c index c890c42106..60fc8cc6ca 100644 --- a/lib/eal/linux

[v1 22/24] tap: add system call number for LoongArch

This patch adds system call number of bpf for LoongArch architecture. Signed-off-by: Min Zhou --- drivers/net/tap/tap_bpf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/tap/tap_bpf.h b/drivers/net/tap/tap_bpf.h index f0b9fc7a2c..b1c9600ed8 100644 --- a/drivers

[v1 21/24] i40e: add dummy vector implementation for LoongArch

The purpose of this patch is used to fix building issues for LoongArch architecture. The hardware instructions based vector implementation will come in a future patch. Signed-off-by: Min Zhou --- drivers/net/i40e/i40e_rxtx_vec_lsx.c | 54 drivers/net/i40e

[v1 19/24] lpm: add dummy vector implementation for LoongArch

The hardware instructions based vector implementation will come in a future patch. This dummy implementation can also work. Signed-off-by: Min Zhou --- app/test/test_xmmt_ops.h | 17 ++ lib/lpm/meson.build | 1 + lib/lpm/rte_lpm.h| 2 + lib/lpm/rte_lpm_lsx.h| 129

[v1 20/24] ixgbe: add dummy vector implementation for LoongArch

The purpose of this patch is used to fix building issues for LoongArch architecture. The hardware instructions based vector implementation will come in a future patch. Signed-off-by: Min Zhou --- drivers/net/ixgbe/ixgbe_rxtx_vec_lsx.c | 60 ++ drivers/net/ixgbe

[v1 23/24] memif: add system call number for LoongArch

This patch adds system call number of memfd_create for LoongArch architecture. Signed-off-by: Min Zhou --- drivers/net/memif/rte_eth_memif.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/memif/rte_eth_memif.h b/drivers/net/memif/rte_eth_memif.h index

[v1 24/24] maintainers: claim responsibility for LoongArch

This patch adds claim responsibility for LoongArch architecture. Signed-off-by: Min Zhou --- MAINTAINERS | 9 + 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 17a0559ee7..69ea00cddf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -269,6 +269,15 @@ F: lib/eal

[v2 11/24] eal/loongarch: add pflock operations for LoongArch

This patch adds pflock operations for LoongArch architecture. Let it uses generic pflock implementation. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_pflock.h | 17 + 1 file changed, 17 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_pflock.h diff

[v2 10/24] eal/loongarch: add pause operations for LoongArch

This patch adds architecture specific pause operations for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_pause.h | 24 1 file changed, 24 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_pause.h diff --git a/lib/eal

[v2 05/24] eal/loongarch: add spinlock operations for LoongArch

This patch adds spinlock operations for LoongArch architecture. These implementations are based on standard atomics of toolchain and heavily reference generic spinlock codes. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_spinlock.h | 90 1 file changed, 90

[v2 21/24] i40e: add dummy vector implementation for LoongArch

The purpose of this patch is used to fix building issues for LoongArch architecture. The hardware instructions based vector implementation will come in a future patch. Signed-off-by: Min Zhou --- drivers/net/i40e/i40e_rxtx_vec_lsx.c | 54 drivers/net/i40e

[v2 00/24] Support LoongArch architecture

/LoongArch-Documentation/README-EN.html v2: - use standard atomics of toolchain to implement atomic operations - implement spinlock based on standard atomics Min Zhou (24): eal/loongarch: add atomic operations for LoongArch eal/loongarch: add byte order operations for

[v2 07/24] eal/loongarch: add dummy vector memcpy for LoongArch

The hardware instructions based vector implementation for memcpy will come later. At present, this dummy implementation can also work. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_memcpy.h | 193 + lib/eal/loongarch/include/rte_vect.h | 47 ++ 2 files

[v2 12/24] eal/loongarch: add rwlock operations for LoongArch

This patch adds rwlock operations for LoongArch architecture. These implementations refer to rte_rwlock.h of PPC. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_rwlock.h | 42 ++ 1 file changed, 42 insertions(+) create mode 100644 lib/eal/loongarch/include

[v2 04/24] eal/loongarch: add prefetch operations for LoongArch

This patch adds architecture specific prefetch operations for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_prefetch.h | 47 1 file changed, 47 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_prefetch.h diff --git a

[v2 23/24] memif: add system call number for LoongArch

This patch adds system call number of memfd_create for LoongArch architecture. Signed-off-by: Min Zhou --- drivers/net/memif/rte_eth_memif.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/memif/rte_eth_memif.h b/drivers/net/memif/rte_eth_memif.h index

[v2 01/24] eal/loongarch: add atomic operations for LoongArch

This patch adds architecture specific atomic operations for LoongArch architecture. These implementations use standard atomics of toolchain and heavily reference generic atomics codes. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_atomic.h | 253 + 1 file

[v2 24/24] maintainers: claim responsibility for LoongArch

This patch adds claim responsibility for LoongArch architecture. Signed-off-by: Min Zhou --- MAINTAINERS | 9 + 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 17a0559ee7..69ea00cddf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -269,6 +269,15 @@ F: lib/eal

[v2 14/24] eal/loongarch: add power operations for LoongArch

This patch adds power operations for LoongArch architecture. In fact, these operations are temporarily not supported on LoongArch. Signed-off-by: Min Zhou --- .../loongarch/include/rte_power_intrinsics.h | 20 lib/eal/loongarch/rte_power_intrinsics.c | 51 +++ 2

[v2 08/24] eal/loongarch: add io operations for LoongArch

This patch adds io operations for LoongArch architecture. Let it uses generic I/O implementation. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_io.h | 18 ++ 1 file changed, 18 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_io.h diff --git a/lib/eal

[v2 20/24] ixgbe: add dummy vector implementation for LoongArch

The purpose of this patch is used to fix building issues for LoongArch architecture. The hardware instructions based vector implementation will come in a future patch. Signed-off-by: Min Zhou --- drivers/net/ixgbe/ixgbe_rxtx_vec_lsx.c | 60 ++ drivers/net/ixgbe

[v2 06/24] eal/loongarch: add cpu flag checks for LoongArch

This patch uses aux vector software register to get CPU flags and add CPU flag checking support for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_cpuflags.h | 39 ++ lib/eal/loongarch/rte_cpuflags.c | 94 2 files

[v2 03/24] eal/loongarch: add cpu cycle operations for LoongArch

processor during the execution of the software. We can use this instruction to calculate the frequency used by the timer. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_cycles.h | 53 ++ lib/eal/loongarch/rte_cycles.c | 45 ++ 2 files

[v2 02/24] eal/loongarch: add byte order operations for LoongArch

This patch adds architecture specific byte order operations for LoongArch architecture. LoongArch bit designations are always little-endian. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_byteorder.h | 46 +++ 1 file changed, 46 insertions(+) create mode 100644

[v2 18/24] meson: introduce LoongArch architecture

This patch adds some meson.build files for building DPDK on LoongArch architecture. Signed-off-by: Min Zhou --- .../loongarch/loongarch_loongarch64_linux_gcc | 16 +++ config/loongarch/meson.build | 46 +++ lib/eal/loongarch/include/meson.build | 21

[v2 17/24] eal/linux: set eal base address for LoongArch

This patch sets a different eal base address for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/linux/eal_memory.c | 4 1 file changed, 4 insertions(+) diff --git a/lib/eal/linux/eal_memory.c b/lib/eal/linux/eal_memory.c index c890c42106..60fc8cc6ca 100644 --- a/lib/eal/linux

[v2 09/24] eal/loongarch: add mcslock operations for LoongArch

This patch adds mcslock operations for LoongArch architecture. Let it uses generic mcslock implementation. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_mcslock.h | 18 ++ 1 file changed, 18 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_mcslock.h

[v2 15/24] eal/loongarch: add hypervisor operations for LoongArch

This patch adds hypervisor operations for LoongArch architecture. In fact, these operations are currently not supported on LoongArch. Signed-off-by: Min Zhou --- lib/eal/loongarch/rte_hypervisor.c | 11 +++ 1 file changed, 11 insertions(+) create mode 100644 lib/eal/loongarch

[v2 22/24] tap: add system call number for LoongArch

This patch adds system call number of bpf for LoongArch architecture. Signed-off-by: Min Zhou --- drivers/net/tap/tap_bpf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/tap/tap_bpf.h b/drivers/net/tap/tap_bpf.h index f0b9fc7a2c..b1c9600ed8 100644 --- a/drivers

[v2 16/24] mem: add huge page size definition for LoongArch

LoongArch architecture has a different huge page size (32MB) than other architectures. This patch adds a new huge page size for LoongArch architecture. Signed-off-by: Min Zhou --- lib/eal/include/rte_memory.h | 1 + lib/eal/include/rte_memzone.h | 1 + 2 files changed, 2 insertions(+) diff

[v2 13/24] eal/loongarch: add ticketlock operations for LoongArch

This patch adds ticketlock operations for LoongArch architecture. Let it uses generic ticketlock implementation. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_ticketlock.h | 18 ++ 1 file changed, 18 insertions(+) create mode 100644 lib/eal/loongarch/include

[v2 19/24] lpm: add dummy vector implementation for LoongArch

The hardware instructions based vector implementation will come in a future patch. This dummy implementation can also work. Signed-off-by: Min Zhou --- app/test/test_xmmt_ops.h | 17 ++ lib/lpm/meson.build | 1 + lib/lpm/rte_lpm.h| 2 + lib/lpm/rte_lpm_lsx.h| 129

[PATCH v2] net/ixgbe: consider DCB/VMDq conf when getting RSS conf

. Signed-off-by: Min Zhou --- v2: - Add warning messages when removing RSS for virtualization and RSS with 32 pools --- drivers/net/ixgbe/ixgbe_rxtx.c | 94 ++ 1 file changed, 83 insertions(+), 11 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers

[PATCH v3] net/ixgbe: add proper memory barriers for some Rx functions

orrect. We also did the same thing in the ixgbe_recv_pkts() function to make the rxd data be valid even though we did not find segmentation fault in this function. Fixes: 8eecb3295ae ("ixgbe: add LRO support") Cc: sta...@dpdk.org Signed-off-by: Min Zhou --- v3: - Use rte_smp_rmb() as th

[PATCH 1/1] net/ixgbe: add a proper memory barrier for LoongArch

LoongArch processor. We should add rte_rmb() to ensure the read ordering be correct. We also did the same thing in the ixgbe_recv_pkts() function. Signed-off-by: Min Zhou --- drivers/net/ixgbe/ixgbe_rxtx.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c

[RFC] app/testpmd: use RSS conf from software when configuring DCB

instead of reading from the hardware register when configuring DCB? Signed-off-by: Min Zhou --- app/test-pmd/testpmd.c | 11 +-- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c index 5cb6f92523..3c382267b8 100644 --- a/app/test

[PATCH] net/ixgbe: consider DCB/VMDq conf when getting RSS conf

. Signed-off-by: Min Zhou --- drivers/net/ixgbe/ixgbe_rxtx.c | 91 ++ 1 file changed, 80 insertions(+), 11 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c index c9d6ca9efe..1eff0053ed 100644 --- a/drivers/net/ixgbe

[PATCH v2] net/ixgbe: add proper memory barriers for some Rx functions

on fault in this function. Signed-off-by: Min Zhou --- v2: - Make the calling of rte_rmb() for all platforms --- drivers/net/ixgbe/ixgbe_rxtx.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c index c9d6ca9efe..302a5ab7ff 10

[PATCH v4] net/ixgbe: add proper memory barriers for some Rx functions

orrect. We also did the same thing in the ixgbe_recv_pkts() function to make the rxd data be valid even though we did not find segmentation fault in this function. Fixes: 8eecb3295ae ("ixgbe: add LRO support") Cc: sta...@dpdk.org Signed-off-by: Min Zhou --- v4: - Replace rte_smp_rmb()

[PATCH v7 1/7] eal/loongarch: support LoongArch architecture

/loongarch/rte_hypervisor.c create mode 100644 lib/eal/loongarch/rte_power_intrinsics.c diff --git a/MAINTAINERS b/MAINTAINERS index 51d77460ec..6c5fcef749 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -294,6 +294,12 @@ F: app/*/*_neon.* F: examples/*/*_neon.* F: examples/common/neon/ +LoongArch +M: Mi

[PATCH v7 7/7] ci: add LOONGARCH64 cross compilation job

Checks cross-compilation using Ubuntu 20.04 x86 for LoongArch. Signed-off-by: Min Zhou --- .ci/linux-build.sh | 10 ++ .github/workflows/build.yml | 10 +- 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/.ci/linux-build.sh b/.ci/linux-build.sh index

[PATCH v7 0/7] Introduce support for LoongArch architecture

compiler for cross compiling - remove useless variable in meson.build v2: - use standard atomics of toolchain to implement atomic operations - implement spinlock based on standard atomics Min Zhou (7): eal/loongarch: support LoongArch architecture net/ixgbe: add vector stubs

[PATCH v7 2/7] net/ixgbe: add vector stubs for LoongArch

, l2fwd, l3fwd examples. Signed-off-by: Min Zhou --- doc/guides/nics/features/ixgbe.ini | 1 + drivers/net/ixgbe/ixgbe_rxtx.c | 7 +-- drivers/net/ixgbe/meson.build | 6 -- 3 files changed, 6 insertions(+), 8 deletions(-) diff --git a/doc/guides/nics/features/ixgbe.ini b/doc

[PATCH v7 5/7] examples/l3fwd: enable LoongArch operation

Add missing em_mask_key() implementation to enable the l3fwd to be run on LoongArch. Signed-off-by: Min Zhou --- examples/l3fwd/l3fwd_em.c | 8 examples/l3fwd/meson.build | 6 -- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/examples/l3fwd/l3fwd_em.c b/examples

[PATCH v7 4/7] net/tap: set BPF syscall ID for LoongArch

Define the missing __NR_bpf syscall id to enable the tap PMD on LoongArch. Signed-off-by: Min Zhou --- drivers/net/tap/meson.build | 6 -- drivers/net/tap/tap_bpf.h | 2 ++ 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/net/tap/meson.build b/drivers/net/tap

[PATCH v7 6/7] test/cpuflags: add test for LoongArch cpu flag

Add checks for all flag values defined in the LoongArch cpu feature table. Signed-off-by: Min Zhou --- app/test/test_cpuflags.c | 41 1 file changed, 41 insertions(+) diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c index 98a99c2c7d

[PATCH v7 3/7] net/memif: set memfd syscall ID on LoongArch

Define the missing __NR_memfd_create syscall id to enable the memif PMD on LoongArch. Signed-off-by: Min Zhou --- drivers/net/memif/meson.build | 6 -- drivers/net/memif/rte_eth_memif.h | 2 ++ 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/net/memif/meson.build

[PATCH v8 3/6] net/memif: set memfd syscall ID on LoongArch

Define the missing __NR_memfd_create syscall id to enable the memif PMD on LoongArch. Signed-off-by: Min Zhou --- drivers/net/memif/meson.build | 6 -- drivers/net/memif/rte_eth_memif.h | 2 ++ 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/net/memif/meson.build

[PATCH v8 2/6] net/ixgbe: add vector stubs for LoongArch

, l2fwd, l3fwd examples. Signed-off-by: Min Zhou --- doc/guides/nics/features/ixgbe.ini | 1 + drivers/net/ixgbe/ixgbe_rxtx.c | 7 +-- drivers/net/ixgbe/meson.build | 6 -- 3 files changed, 6 insertions(+), 8 deletions(-) diff --git a/doc/guides/nics/features/ixgbe.ini b/doc

[PATCH v8 0/6] Introduce support for LoongArch architecture

ble in meson.build v2: - use standard atomics of toolchain to implement atomic operations - implement spinlock based on standard atomics Min Zhou (6): eal/loongarch: support LoongArch architecture net/ixgbe: add vector stubs for LoongArch net/memif: set memfd syscall ID

[PATCH v8 5/6] examples/l3fwd: enable LoongArch operation

Add missing em_mask_key() implementation to enable the l3fwd to be run on LoongArch. Signed-off-by: Min Zhou --- examples/l3fwd/l3fwd_em.c | 8 examples/l3fwd/meson.build | 6 -- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/examples/l3fwd/l3fwd_em.c b/examples

[PATCH v8 1/6] eal/loongarch: support LoongArch architecture

: examples/common/neon/ +LoongArch +M: Min Zhou +F: config/loongarch/ +F: doc/guides/linux_gsg/cross_build_dpdk_for_loongarch.rst +F: lib/eal/loongarch/ + IBM POWER (alpha) M: David Christensen F: config/ppc/ diff --git a/app/test/test_xmmt_ops.h b/app/test/test_xmmt_ops.h index 55f256599e..

[PATCH v8 4/6] net/tap: set BPF syscall ID for LoongArch

Define the missing __NR_bpf syscall id to enable the tap PMD on LoongArch. Signed-off-by: Min Zhou --- drivers/net/tap/meson.build | 6 -- drivers/net/tap/tap_bpf.h | 2 ++ 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/net/tap/meson.build b/drivers/net/tap

[PATCH v8 6/6] test/cpuflags: add test for LoongArch cpu flag

Add checks for all flag values defined in the LoongArch cpu feature table. Signed-off-by: Min Zhou --- app/test/test_cpuflags.c | 41 1 file changed, 41 insertions(+) diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c index 98a99c2c7d

[PATCH v4 02/24] eal/loongarch: add byte order operations for LoongArch

This patch adds architecture specific byte order operations for LoongArch architecture. LoongArch bit designations are always little-endian. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_byteorder.h | 46 +++ 1 file changed, 46 insertions(+) create mode 100644

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