Re: STM32U585: Can't enable peripheral clock for IO port I (GPIOIEN in RCC_AHB2ENR1)

2022-03-25 Thread Alan Carvalho de Assis
On 3/25/22, Michael Jung wrote: > Hi David, > > I think I figured it out: I am running in the non-secure world of > TrustZone. Turns out ST missed configuring the IO Port I as non-secure in > their STM32U5 port of TrustedFirmware-M (all other IO ports are configured > as non-secure). I am compil

Re: STM32U585: Can't enable peripheral clock for IO port I (GPIOIEN in RCC_AHB2ENR1)

2022-03-25 Thread Michael Jung
, 2022 9:36 AM > To: dev > Subject: Re: STM32U585: Can't enable peripheral clock for IO port I > (GPIOIEN > in RCC_AHB2ENR1) > > Hi David, > > Thanks for your reply. Actually, I am trying to get the B-U585I-IOT02A's > NOR flash chip running, which is connected via

RE: STM32U585: Can't enable peripheral clock for IO port I (GPIOIEN in RCC_AHB2ENR1)

2022-03-25 Thread David Sidrane
Does the CPU busfault if write the GPIOI MODER? Do the values stick when written? -Original Message- From: Michael Jung Sent: Friday, March 25, 2022 9:36 AM To: dev Subject: Re: STM32U585: Can't enable peripheral clock for IO port I (GPIOIEN in RCC_AHB2ENR1) Hi David, Thanks for

Re: STM32U585: Can't enable peripheral clock for IO port I (GPIOIEN in RCC_AHB2ENR1)

2022-03-25 Thread Michael Jung
Hi David, Thanks for your reply. Actually, I am trying to get the B-U585I-IOT02A's NOR flash chip running, which is connected via OCTOSPI. I can issue a single command (READID) to the NOR flash and I get a sane reply, but any follow-on command will just return nonsense (more specifically, the R

RE: STM32U585: Can't enable peripheral clock for IO port I (GPIOIEN in RCC_AHB2ENR1)

2022-03-25 Thread David Sidrane
Hi Michael, Odd. Did you check the defines? How are you verifying it? Have you JTAG-ed it, could it be bad SVD? Have you just printed the value to be set and the result ? David -Original Message- From: Michael Jung Sent: Friday, March 25, 2022 9:07 AM To: dev Subject: STM32U585: Can't