The branch main has been updated by brooks:
URL:
https://cgit.FreeBSD.org/src/commit/?id=6a968ad5d962ae45433d0591e1a9669a45b57d67
commit 6a968ad5d962ae45433d0591e1a9669a45b57d67
Author: Brooks Davis <bro...@freebsd.org>
AuthorDate: 2022-05-20 16:11:27 +0000
Commit: Brooks Davis <bro...@freebsd.org>
CommitDate: 2022-05-20 16:11:27 +0000
sys/dts: Remove MIPS files
Reviewed by: manu, imp
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D35263
---
sys/dts/Makefile | 2 +-
sys/dts/mips/Makefile | 7 -
sys/dts/mips/beri-netfpga.dts | 162 -------------------
sys/dts/mips/beri-sim.dts | 160 -------------------
sys/dts/mips/beripad-de4.dts | 336 ----------------------------------------
sys/dts/mips/beripad-sockit.dts | 223 --------------------------
sys/dts/mips/fbsd-mt7620a.dtsi | 9 --
sys/dts/mips/fbsd-mt7621.dtsi | 49 ------
sys/dts/mips/fbsd-mt7628an.dtsi | 40 -----
sys/dts/mips/fbsd-rt3883.dtsi | 16 --
sys/dts/mips/xlp-basic.dts | 80 ----------
11 files changed, 1 insertion(+), 1083 deletions(-)
diff --git a/sys/dts/Makefile b/sys/dts/Makefile
index 66f65a712fe4..ae57a10819c7 100644
--- a/sys/dts/Makefile
+++ b/sys/dts/Makefile
@@ -1,5 +1,5 @@
# $FreeBSD$
-SUBDIR=arm mips powerpc
+SUBDIR=arm powerpc
.include <bsd.subdir.mk>
diff --git a/sys/dts/mips/Makefile b/sys/dts/mips/Makefile
deleted file mode 100644
index 855f8847d514..000000000000
--- a/sys/dts/mips/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# $FreeBSD$
-
-DTS!=ls ${.CURDIR}/*.dts
-
-all: test-dts
-
-.include <bsd.init.mk>
diff --git a/sys/dts/mips/beri-netfpga.dts b/sys/dts/mips/beri-netfpga.dts
deleted file mode 100644
index 205b7eea86e4..000000000000
--- a/sys/dts/mips/beri-netfpga.dts
+++ /dev/null
@@ -1,162 +0,0 @@
-/*-
- * Copyright (c) 2012-2013 Robert N. M. Watson
- * Copyright (c) 2013 SRI International
- * Copyright (c) 2013-2014 Bjoern A. Zeeb
- * All rights reserved.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
- * ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-11-C-0249)
- * ("MRC2"), as part of the DARPA MRC research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/dts-v1/;
-
-/*
- * Device names here have been largely made up on the spot, especially for the
- * "compatible" strings, and might want to be revised.
- */
-
-/ {
- model = "SRI/Cambridge Beri (NetFPGA)";
- compatible = "sri-cambridge,beri-netfpga";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <1>;
-
- /*
- * Secondary CPUs all start disabled and use the
- * spin-table enable method. cpu-release-addr must be
- * specified for each cpu other than cpu@0. Values of
- * cpu-release-addr grow down from 0x100000 (kernel).
- */
- status = "disabled";
- enable-method = "spin-table";
-
- cpu@0 {
- device-type = "cpu";
- compatible = "sri-cambridge,beri";
-
- reg = <0 1>;
- status = "okay";
- };
-
-/*
- cpu@1 {
- device-type = "cpu";
- compatible = "sri-cambridge,beri";
-
- reg = <1 1>;
- // XXX: should we need cached prefix?
- cpu-release-addr = <0xffffffff 0x800fffe0>;
- };
-*/
- };
-
- memory {
- device_type = "memory";
- reg = <0x0 0x0FFFFFFF>; // ~256M at 0x0
- };
-
- cpuintc: cpuintc@0 {
- #address-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-controller;
- compatible = "mti,cpu-interrupt-controller";
- };
-
- beripic: beripic@7f804000 {
- compatible = "sri-cambridge,beri-pic";
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- reg = <0x7f804000 0x400
- 0x7f806000 0x10
- 0x7f806080 0x10
- 0x7f806100 0x10>;
- interrupts = < 2 3 4 5 6 >;
- hard-interrupt-sources = <64>;
- soft-interrupt-sources = <64>;
- interrupt-parent = <&cpuintc>;
- };
-
- soc {
- #address-cells = <1>;
- #size-cells = <1>;
- #interrupt-cells = <1>;
-
- compatible = "simple-bus", "mips,mips4k";
- ranges;
-
- serial0: serial@7f000000 {
- compatible = "altera,jtag_uart-11_0";
- reg = <0x7f000000 0x40>;
-/*
- interrupts = <0>;
- interrupt-parent = <&beripic>;
-*/
- };
-
-/*
- serial0: serial@7f002100 {
- compatible = "ns16550";
- reg = <0x7f002100 0x20>;
- reg-shift = <2>;
- clock-frequency = <100000000>;
- interrupts = <8>;
- interrupt-parent = <&beripic>;
- };
-*/
-
- ethernet@7f005000 {
- compatible = "netfpag10g,nf10bmac";
- // LOOP, TX, RX, INTR
- reg = <0x7f005000 0x20
- 0x7f005020 0x30
- 0x7f005050 0x30
- 0x7f005100 0x10>;
- // RX
- interrupts = <1>;
- interrupt-parent = <&beripic>;
- };
- };
-
- aliases {
- serial0 = &serial0;
- };
-
- chosen {
- stdin = "serial0";
- stdout = "serial0";
- bootargs = "-v";
- };
-};
diff --git a/sys/dts/mips/beri-sim.dts b/sys/dts/mips/beri-sim.dts
deleted file mode 100644
index 8f116e4327ac..000000000000
--- a/sys/dts/mips/beri-sim.dts
+++ /dev/null
@@ -1,160 +0,0 @@
-/*-
- * Copyright (c) 2012-2013 Robert N. M. Watson
- * Copyright (c) 2013 SRI International
- * All rights reserved.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
- * ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/dts-v1/;
-
-/*
- * Device names here have been largely made up on the spot, especially for the
- * "compatible" strings, and might want to be revised.
- *
- * For now, use 32-bit addressing as our Avalon bus is 32-bit. However, in
- * the future, we should likely change to 64-bit.
- */
-
-/ {
- model = "SRI/Cambridge BERI simulation";
- compatible = "sri-cambridge,beri-sim";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <1>;
-
- /*
- * Secondary CPUs all start disabled and use the
- * spin-table enable method. cpu-release-addr must be
- * specified for each cpu other than cpu@0. Values of
- * cpu-release-addr grow down from 0x100000 (kernel).
- */
- status = "disabled";
- enable-method = "spin-table";
-
- cpu@0 {
- device-type = "cpu";
- compatible = "sri-cambridge,beri";
-
- reg = <0 1>;
- status = "okay";
- };
-
-/*
- cpu@1 {
- device-type = "cpu";
- compatible = "sri-cambridge,beri";
-
- reg = <1 1>;
- // XXX: should we need cached prefix?
- cpu-release-addr = <0xffffffff 0x800fffe0>;
- };
-*/
- };
-
- memory {
- device_type = "memory";
- reg = <0x0 0x4000000>; // 64M at 0x0
- };
-
- cpuintc: cpuintc@0 {
- #address-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-controller;
- compatible = "mti,cpu-interrupt-controller";
- };
-
- beripic0: beripic@7f804000 {
- compatible = "sri-cambridge,beri-pic";
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- reg = <0x7f804000 0x400
- 0x7f806000 0x10
- 0x7f806080 0x10
- 0x7f806100 0x10>;
- interrupts = < 2 3 4 5 6 >;
- hard-interrupt-sources = <64>;
- soft-interrupt-sources = <64>;
- interrupt-parent = <&cpuintc>;
- };
-
- soc {
- #address-cells = <1>;
- #size-cells = <1>;
- #interrupt-cells = <1>;
-
- compatible = "simple-bus", "mips,mips4k";
- ranges;
-
- serial@7f000000 {
- compatible = "altera,jtag_uart-11_0";
- reg = <0x7f000000 0x40>;
- interrupts = <0>;
- interrupt-parent = <&beripic0>;
- };
-
- serial@7f001000 {
- compatible = "altera,jtag_uart-11_0";
- reg = <0x7f001000 0x40>;
- };
-
- serial@7f002000 {
- compatible = "altera,jtag_uart-11_0";
- reg = <0x7f002000 0x40>;
- };
-
- virtio_mmio_platform0: virtio_mmio_platform@0 {
- compatible = "beri,virtio_mmio_platform";
- interrupts = <1>;
- interrupt-parent = <&beripic0>;
- };
-
- virtio_block@7f020000 {
- compatible = "virtio,mmio";
- reg = <0x7f020000 0x1000>;
- platform = <&virtio_mmio_platform0>;
- };
-
- sdcard@7f008000 {
- compatible = "altera,sdcard_11_2011";
- reg = <0x7f008000 0x400>;
- };
-
- avgen@0x7f00a000 {
- compatible = "sri-cambridge,avgen";
- reg = <0x7f00a000 0x14>;
- sri-cambridge,width = <4>;
- sri-cambridge,fileio = "rw";
- sri-cambridge,devname = "berirom";
- };
- };
-};
diff --git a/sys/dts/mips/beripad-de4.dts b/sys/dts/mips/beripad-de4.dts
deleted file mode 100644
index e2e05f72ae76..000000000000
--- a/sys/dts/mips/beripad-de4.dts
+++ /dev/null
@@ -1,336 +0,0 @@
-/*-
- * Copyright (c) 2012-2013 Robert N. M. Watson
- * Copyright (c) 2013 SRI International
- * All rights reserved.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
- * ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/dts-v1/;
-
-/*
- * Device names here have been largely made up on the spot, especially for the
- * "compatible" strings, and might want to be revised.
- *
- * For now, use 32-bit addressing as our Avalon bus is 32-bit. However, in
- * the future, we should likely change to 64-bit.
- */
-
-/ {
- model = "SRI/Cambridge BeriPad (DE4)";
- compatible = "sri-cambridge,beripad-de4";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <1>;
-
- /*
- * Secondary CPUs all start disabled and use the
- * spin-table enable method. cpu-release-addr must be
- * specified for each cpu other than cpu@0. Values of
- * cpu-release-addr grow down from 0x100000 (kernel).
- */
- status = "disabled";
- enable-method = "spin-table";
-
- cpu@0 {
- device-type = "cpu";
- compatible = "sri-cambridge,beri";
-
- reg = <0 1>;
- status = "okay";
- };
-
-/*
- cpu@1 {
- device-type = "cpu";
- compatible = "sri-cambridge,beri";
-
- reg = <1 1>;
- // XXX: should we need cached prefix?
- cpu-release-addr = <0xffffffff 0x800fffe0>;
- };
-*/
- };
-
- memory {
- device_type = "memory";
- reg = <0x0 0x40000000>; // 1G at 0x0
- };
-
- cpuintc: cpuintc@0 {
- #address-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-controller;
- compatible = "mti,cpu-interrupt-controller";
- };
-
- beripic0: beripic@7f804000 {
- compatible = "sri-cambridge,beri-pic";
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- reg = <0x7f804000 0x400
- 0x7f806000 0x10
- 0x7f806080 0x10
- 0x7f806100 0x10>;
- interrupts = < 2 3 4 5 6 >;
- hard-interrupt-sources = <64>;
- soft-interrupt-sources = <64>;
- interrupt-parent = <&cpuintc>;
- };
-
-/*
- beripic1: beripic@7f808000 {
- compatible = "sri-cambridge,beri-pic";
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- reg = <0x7f808000 0x400
- 0x7f80a000 0x10
- 0x7f80a080 0x10
- 0x7f80a100 0x10>;
- interrupts = < 2 3 4 5 6 >;
- hard-interrupt-sources = <64>;
- soft-interrupt-sources = <64>;
- interrupt-parent = <&cpuintc>;
- };
-*/
-
- soc {
- #address-cells = <1>;
- #size-cells = <1>;
- #interrupt-cells = <1>;
-
- compatible = "simple-bus", "mips,mips4k";
- ranges;
-
- serial@7f002100 {
- compatible = "ns16550";
- reg = <0x7f002100 0x20>;
- reg-shift = <2>;
- clock-frequency = <50000000>;
- interrupts = <6>;
- interrupt-parent = <&beripic0>;
- };
-
- serial@7f000000 {
- compatible = "altera,jtag_uart-11_0";
- reg = <0x7f000000 0x40>;
- interrupts = <0>;
- interrupt-parent = <&beripic0>;
- };
-
- serial@7f001000 {
- compatible = "altera,jtag_uart-11_0";
- reg = <0x7f001000 0x40>;
- };
-
- serial@7f002000 {
- compatible = "altera,jtag_uart-11_0";
- reg = <0x7f002000 0x40>;
- };
-
- sdcard@7f008000 {
- compatible = "altera,sdcard_11_2011";
- reg = <0x7f008000 0x400>;
- };
-
- led@7f006000 {
- compatible = "sri-cambridge,de4led";
- reg = <0x7f006000 0x1>;
- };
-
- /*
- * XXX-BZ keep flash before ethernet so that atse can read the
- * Ethernet addresses for now.
- */
- flash@74000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "cfi-flash";
- reg = <0x74000000 0x4000000>;
-
- /* Board configuration */
- partition@0 {
- reg = <0x0 0x20000>;
- label = "config";
- };
-
- /* Power up FPGA image */
- partition@20000 {
- reg = <0x20000 0xc00000>;
- label = "fpga0";
- };
-
- /* Secondary FPGA image (on RE_CONFIGn button) */
- partition@C20000 {
- reg = <0xc20000 0xc00000>;
- label = "fpga1";
- };
-
- /* Space for operating system use */
- partition@1820000 {
- reg = <0x1820000 0x027c0000>;
- label = "os";
- };
-
- /* Second stage bootloader */
- parition@3fe0000 {
- reg = <0x3fe0000 0x20000>;
- label = "boot";
- };
- };
-
- msgdma0: msgdma@80004080 {
- compatible = "altr,msgdma-16.0", "altr,msgdma-1.0";
- reg = <0x80004080 0x00000020>,
- <0x800040a0 0x00000020>;
- reg-names = "csr", "descriptor_slave";
- interrupts = <14>;
- interrupt-parent = <&beripic0>;
- #dma-cells = <3>;
- };
-
- msgdma1: msgdma@80004000 {
- compatible = "altr,msgdma-16.0", "altr,msgdma-1.0";
- reg = <0x80004000 0x00000020>,
- <0x80004020 0x00000020>;
- reg-names = "csr", "descriptor_slave";
- interrupts = <13>;
- interrupt-parent = <&beripic0>;
- #dma-cells = <3>;
- };
-
- softdma0: softdma@7f007400 {
- compatible = "altr,softdma";
- reg = < 0x7f007400 0x8 /* tx */
- 0x7f007420 0x20 >; /* txc */
- interrupts = <2>;
- interrupt-parent = <&beripic0>;
- #dma-cells = <3>;
- };
-
- softdma1: softdma@7f007500 {
- compatible = "altr,softdma";
- reg = < 0x7f007500 0x8 /* rx */
- 0x7f007520 0x20 >; /* rxc */
- interrupts = <1>;
- interrupt-parent = <&beripic0>;
- #dma-cells = <3>;
- };
-
- softdma2: softdma@7f005400 {
- compatible = "altr,softdma";
- reg = < 0x7f005400 0x8 /* tx */
- 0x7f005420 0x20 >; /* txc */
- interrupts = <12>;
- interrupt-parent = <&beripic0>;
- #dma-cells = <3>;
- };
-
- softdma3: softdma@7f005500 {
- compatible = "altr,softdma";
- reg = < 0x7f005500 0x8 /* rx */
- 0x7f005520 0x20 >; /* rxc */
- interrupts = <11>;
- interrupt-parent = <&beripic0>;
- #dma-cells = <3>;
- };
-
- ethernet@80007000 {
- compatible = "altera,atse";
- reg = <0x80007000 0x400>; /* mac */
- dmas = <&msgdma0 0 0 0xffffffff>,
- <&msgdma1 1 1 0xffffffff>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- ethernet@7f007000 {
- compatible = "altera,atse";
- reg = <0x7f007000 0x400>; /* mac */
- dmas = <&softdma0 0 0 0xffffffff>,
- <&softdma1 1 1 0xffffffff>;
- dma-names = "tx", "rx";
- status = "okay";
- };
-
- ethernet@7f005000 {
- compatible = "altera,atse";
- reg = <0x7f005000 0x400>;
- dmas = <&softdma2 0 0 0xffffffff>,
- <&softdma3 1 1 0xffffffff>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- touchscreen@70400000 {
- compatible = "sri-cambridge,mtl";
- panel-size = < 800 480 >;
- reg = <0x70400000 0x1000
- 0x70000000 0x177000
- 0x70177000 0x2000>;
- };
-
- usb@0x7f100000 {
- compatible = "nxp,usb-isp1761";
- reg = <0x7f100000 0x40000
- 0x7f140000 0x4>;
- // IRQ 4 is DC, IRQ 5 is HC.
- interrupts = <4 5>;
- interrupt-parent = <&beripic0>;
- };
-
- avgen@0x7f009000 {
- compatible = "sri-cambridge,avgen";
- reg = <0x7f009000 0x2>;
- sri-cambridge,width = <1>;
- sri-cambridge,fileio = "r";
- sri-cambridge,devname = "de4bsw";
- };
-
- avgen@0x7f00a000 {
- compatible = "sri-cambridge,avgen";
- reg = <0x7f00a000 0x14>;
- sri-cambridge,width = <4>;
- sri-cambridge,fileio = "rw";
- sri-cambridge,devname = "berirom";
- };
-
- avgen@0x7f00c000 {
- compatible = "sri-cambridge,avgen";
- reg = <0x7f00c000 0x8>;
- sri-cambridge,width = <4>;
- sri-cambridge,fileio = "rw";
- sri-cambridge,devname = "de4tempfan";
- };
- };
-};
diff --git a/sys/dts/mips/beripad-sockit.dts b/sys/dts/mips/beripad-sockit.dts
deleted file mode 100644
index fe096cc4e42a..000000000000
--- a/sys/dts/mips/beripad-sockit.dts
+++ /dev/null
@@ -1,223 +0,0 @@
-/*-
- * Copyright (c) 2012-2013 Robert N. M. Watson
- * Copyright (c) 2013-2014 SRI International
- * Copyright (c) 2014 Ruslan Bukin <b...@bsdpad.com>
- * All rights reserved.
- *
- * This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
- * ("CTSRD"), as part of the DARPA CRASH research programme.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/dts-v1/;
-
-/*
- * Device names here have been largely made up on the spot, especially for the
- * "compatible" strings, and might want to be revised.
- */
-
-/ {
- model = "SRI/Cambridge BeriPad (SoCKit)";
- compatible = "sri-cambridge,beripad-sockit";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <1>;
-
- /*
- * Secondary CPUs all start disabled and use the
- * spin-table enable method. cpu-release-addr must be
- * specified for each cpu other than cpu@0. Values of
- * cpu-release-addr grow down from 0x100000 (kernel).
- */
- status = "disabled";
- enable-method = "spin-table";
-
- cpu@0 {
- device-type = "cpu";
- compatible = "sri-cambridge,beri";
-
- reg = <0 1>;
- status = "okay";
- };
-
-/*
- cpu@1 {
- device-type = "cpu";
- compatible = "sri-cambridge,beri";
-
- reg = <1 1>;
- // XXX: should we need cached prefix?
- cpu-release-addr = <0xffffffff 0x800fffe0>;
- };
-*/
- };
-
- memory {
- device_type = "memory";
- reg = <0x0 0x10000000>; /* 256MB at 0x0 */
- };
-
- cpuintc: cpuintc@0 {
- #address-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-controller;
- compatible = "mti,cpu-interrupt-controller";
- };
-
- beripic0: beripic@7f804000 {
- compatible = "sri-cambridge,beri-pic";
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- reg = <0x0 0x7f804000 0x0 0x400
- 0x0 0x7f806000 0x0 0x10
- 0x0 0x7f806080 0x0 0x10
- 0x0 0x7f806100 0x0 0x10>;
- interrupts = < 2 3 4 5 6 >;
- hard-interrupt-sources = <64>;
- soft-interrupt-sources = <64>;
- interrupt-parent = <&cpuintc>;
- };
-
- soc {
- #address-cells = <2>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
-
- compatible = "simple-bus", "mips,mips4k";
- ranges;
-
- pio0: pio@7f020000 {
- compatible = "altr,pio";
- reg = <0x0 0x7f020000 0x0 0x1000>; /* send */
- interrupts = <4>; /* not used */
- interrupt-parent = <&beripic0>;
- };
-
- pio1: pio@7f021000 {
- compatible = "altr,pio";
- reg = <0x0 0x7f021000 0x0 0x1000>; /* recv */
- interrupts = <10>;
- interrupt-parent = <&beripic0>;
- };
-
- pio2: pio@7f022000 {
- compatible = "altr,pio";
- reg = <0x0 0x7f022000 0x0 0x1000>; /* send */
- interrupts = <5>; /* not used */
- interrupt-parent = <&beripic0>;
- };
-
- pio3: pio@7f023000 {
- compatible = "altr,pio";
- reg = <0x0 0x7f023000 0x0 0x1000>; /* recv */
- interrupts = <11>;
- interrupt-parent = <&beripic0>;
- };
-
- virtio_mmio_platform0: virtio_mmio_platform@0 {
- compatible = "beri,virtio_mmio_platform";
- pio-send = <&pio0>;
- pio-recv = <&pio1>;
- };
-
- virtio_mmio_platform1: virtio_mmio_platform@1 {
- compatible = "beri,virtio_mmio_platform";
- pio-send = <&pio2>;
- pio-recv = <&pio3>;
- };
-
- virtio_block@200001000 {
- compatible = "virtio,mmio";
- reg = <0x2 0x1000 0x0 0x1000>;
- platform = <&virtio_mmio_platform0>;
- status = "okay";
- };
-
- virtio_net@200002000 {
- compatible = "virtio,mmio";
- reg = <0x2 0x2000 0x0 0x1000>;
- platform = <&virtio_mmio_platform1>;
- status = "okay";
- };
-
- serial@7f000000 {
- compatible = "altera,jtag_uart-11_0";
- reg = <0x0 0x7f000000 0x0 0x40>;
- interrupts = <0>;
- interrupt-parent = <&beripic0>;
- };
-
-/*
- serial@7f001000 {
- compatible = "altera,jtag_uart-11_0";
- reg = <0x7f001000 0x40>;
- };
-
- serial@7f002000 {
- compatible = "altera,jtag_uart-11_0";
- reg = <0x7f002000 0x40>;
- };
-*/
-
-/*
- led@7f006000 {
- compatible = "sri-cambridge,de4led";
- reg = <0x7f006000 0x1>;
- };
-*/
-
-/*
- avgen@0x7f009000 {
- compatible = "sri-cambridge,avgen";
- reg = <0x7f009000 0x2>;
- sri-cambridge,width = <1>;
- sri-cambridge,fileio = "r";
- sri-cambridge,devname = "de4bsw";
- };
-*/
-
-/*
- berirom@0x7f00a000 {
- compatible = "sri-cambridge,berirom";
- reg = <0x7f00a000 0x1000>;
- };
-*/
-
-/*
- avgen@0x7f00c000 {
- compatible = "sri-cambridge,avgen";
- reg = <0x7f00c000 0x8>;
- sri-cambridge,width = <4>;
- sri-cambridge,fileio = "rw";
- sri-cambridge,devname = "de4tempfan";
- };
-*/
- };
-};
diff --git a/sys/dts/mips/fbsd-mt7620a.dtsi b/sys/dts/mips/fbsd-mt7620a.dtsi
deleted file mode 100644
index e88117b9e1f4..000000000000
--- a/sys/dts/mips/fbsd-mt7620a.dtsi
+++ /dev/null
@@ -1,9 +0,0 @@
-/* $FreeBSD$ */
-
-&pcie {
- /*
- * Our driver is different that OpenWRT's, so we need slightly
- * different values for the reg property
- */
- reg = <0x10140000 0x10000>;
-};
diff --git a/sys/dts/mips/fbsd-mt7621.dtsi b/sys/dts/mips/fbsd-mt7621.dtsi
deleted file mode 100644
index eee36b2a0e36..000000000000
--- a/sys/dts/mips/fbsd-mt7621.dtsi
+++ /dev/null
@@ -1,49 +0,0 @@
-/* $FreeBSD$ */
-
-&palmbus {
- gpio@600 {
- /*
- * Mark gpio as compatible to simple-bus and override
- * its #size-cells and provide a default ranges property
- * so we can attach instances of our mtk_gpio_v2 driver
*** 195 LINES SKIPPED ***
