[edk2-devel] [PATCH V5]
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3473
X64 Reset Vector Code can access the memory range till 4GB using the
Linear-Address Translation to a 2-MByte Page, when user wants to use
more than 4G using 2M Page it will leads to use more number of Page
table entrie
[edk2-devel] [PATCH V5]
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3473
X64 Reset Vector Code can access the memory range till 4GB using the
Linear-Address Translation to a 2-MByte Page, when user wants to use
more than 4G using 2M Page it will leads to use more number of Page
table entrie
Hi Ray,
There are only "UniversalPayloadEntry.inf" and "UefiPayloadEntry.inf" under
[Components.IA32] in UefiPayloadPkg.dsc. The [Packages] sections in these two
.inf file only contain MdePkg, MdeModulePkg, UefiCpuPkg and UefiPayloadPkg. So
the PCDs in .dec files of these four pkgs used in Uefi
SEC phase will throw an assertion in IsSevGuest if
PcdOvmfConfidentialComputingWorkAreaHeader doesn't match the
sizeof CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER.
Signed-off-by: Corvin Köhne
---
OvmfPkg/Bhyve/BhyveDefines.fdf.inc | 6 ++
1 file changed, 6 insertions(+)
diff --git a/OvmfPkg/Bhy
Reviewed-by: Ray Ni
-Original Message-
From: Tan, Dun
Sent: Wednesday, September 15, 2021 4:55 PM
To: Ni, Ray ; devel@edk2.groups.io
Cc: Dong, Guo ; Ma, Maurice ; You,
Benjamin
Subject: RE: [PATCH] UefiPayloadPkg: Fix the warning when building
UefiPayloadPkg with IA32+X64
Hi Ray,
T
Reviewed-by: Barton Gao
Thanks
Barton
-邮件原件-
发件人: bounce+27952+68636+5325328+9289...@groups.io
代表 Chen, ArvinX
发送时间: 2020年12月10日 16:01
收件人: devel@edk2.groups.io
抄送: G Edhaya Chandran ; Samer El-Haj-Mahmoud
; Eric Jin ; Heinrich
Schuchardt
主题: [PATCH] [edk2-devel] RecordAssertion functi
Hi
To avoid unnecessary change in DSC/FDF, can we change default size to be 4 in
DEC?
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfConfidentialComputingWorkAreaHeader|4|UINT32|0x51
We shall also add comment on 4 ==
sizeof(CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER) in OvmfPkg/Include/WorkArea.h.
Thank you
Extending PciBus to support such case is valid.
But can you check if there is other pure software way to detect whether it's an
ECiEP?
From: Bassa, Damian
Sent: Wednesday, September 15, 2021 7:54 PM
To: Wu, Hao A ; devel@edk2.groups.io; Ni, Ray
Subject: RE: [edk2-devel] [PATCH] MdeModulePkg/P
According to SMBIOS 3.4, section 7.5.3.3 ARM64-class CPUs, if
SMCCC_ARCH_SOC_ID is supported, the first DWORD is the JEP-106 code and
the second DWORD is the SoC revision value. But in the current
implementation, they are set in reverse. This patch is to correct it.
Cc: Leif Lindholm
Cc: Ard Bies
Should we consider this workaround? I'm having issues interpreting this part of
PCIe spec.
My understanding of this quote is that this capability can exist in but it
shouldn't be considered.
I would assume it's possible option that it needs to be considered? Is that
wrong?
Damian
From: Wu, Ha
Well that's a large number of conflicts.
I find it unprofessional that I have been waiting over a month for a
MinPlatformPkg maintainer to review and merge my patch while the patches
that were merged and cause conflicts were not reviewed by or merged by a
MinPlatformPkg maintainer:
https://g
This patch series adds the support for the Mt. Jade platform based on Ampere's
Altra Family Processor.
Notes:
+ The current patch series was tested with the edk2-stable202108 tag.
+ The IASL compiler version 20201217 is required to build.
+ The edk2-non-osi source is required to build.
You
From: Vu Nguyen
The MmCommunicationDxe module is derived from
ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf.
The MmCommunication PEI and DXE modules implement the MM Communication
protocol (EFI_MM_COMMUNICATION_PROTOCOL) as defined in the PI 1.5
specification for the interface between UE
The Ampere Altra System Firmware provides a fail-safe feature to help
recover the system if there are setting changes such as Core voltage,
DRAM parameters that cause the UEFI failed to boot.
The FailSafeLib supports API calls to Secure World to:
* Get the FailSafe region information.
* Get the cu
The FailSafeDxe is a driver for the FailSafe feature which reverts the
system's configuration to known good values if the system fails to boot
up multiple times. Also, this driver implements the Watchdog Timer
Architectural Protocol to reset the system if it hangs, which is
implemented by the MdeMo
From: Vu Nguyen
The DwI2cLib library provides basic functions to control the I2C
controller on Ampere Altra processor.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ard Biesheuvel
Cc: Nate DeSimone
Signed-off-by: Vu Nguyen
Reviewed-by: Leif Lin
From: Vu Nguyen
The DwGpioLib library provides basic functions to control the GPIO
controller on Ampere Altra processor.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ard Biesheuvel
Cc: Nate DeSimone
Signed-off-by: Vu Nguyen
Reviewed-by: Leif L
From: Vu Nguyen
This library adds the support for retrieving and updating system
datetime over real RTC PCF85063 device on Mt. Jade platform instead of
using virtual RTC.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ard Biesheuvel
Cc: Nate DeSimo
From: Quan Nguyen
BootProgress will send 32-bit UEFI Status Code via doorbell to report
its progress status.
Currently support reporting Progress Status Code and Error Status Code
only. Other types of Status Code are ignored.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc
From: Vu Nguyen
This supports storing the UEFI non-volatile varibles on flash through
the MM communication interface instead of emulating. Below are modules
added for this support:
* FlashLib provides APIs to access flash through MM service.
* FlashPei driver helps to restore the saved variables
From: Vu Nguyen
The idea came from DeviceManagerUiLib that all related menu settings can
be placed under a common entry. This change intends to provide a central
point for all platform menus by creating a Platform Manager entry located
under Device Manager entry of UiApp.
New classuuid called gP
From: Vu Nguyen
Provides essential functions to initialize the PCIe Root Complex of
Ampere Altra processor.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ard Biesheuvel
Cc: Nate DeSimone
Signed-off-by: Vu Nguyen
---
Silicon/Ampere/AmpereAltraP
From: Vu Nguyen
Provides basic features like:
* Screen menu to change the bifurcation setting of each Root Complex.
Note that we can only make change for the Root Complex which doesn't
come with a default value in the BoardSetting.
* Parsing the BoardSetting and coordinate with saved setting
From: Vu Nguyen
Provides the number of supported RootBridges and the resource allocated
for each RootBridge. These information are essential to the HostBridge
driver to initialize the PCIe subsystem.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ar
From: Vu Nguyen
This change also enables the support for SCSI, NVMe, USB keyboard, and
USB storage devices.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ard Biesheuvel
Cc: Nate DeSimone
Signed-off-by: Vu Nguyen
Reviewed-by: Leif Lindholm
---
This wires up the pre-built binary placed in the edk2-non-osi
repository for PCIe VGA Controller support.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ard Biesheuvel
Cc: Nate DeSimone
Signed-off-by: Nhi Pham
Reviewed-by: Leif Lindholm
---
Plat
From: Vu Nguyen
Provides wrapper calls to the Ac01PcieLib to handle the PCIe access.
As Ampere Altra processor supports upto 16 PCIe Root Complexs, the
target Root Complex will depend on the segment number parsed from the
input address.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif L
From: Vu Nguyen
Registers the Platform NotifyPhase() to prevent unexpected issues
caused by the enabled PCIe controllers which have unstable link.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ard Biesheuvel
Cc: Nate DeSimone
Signed-off-by: Vu N
From: Vu Nguyen
This change is to produce RNG protocol which is required by several
modules.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ard Biesheuvel
Cc: Nate DeSimone
Signed-off-by: Vu Nguyen
Reviewed-by: Leif Lindholm
---
Silicon/Ampere
From: Quan Nguyen
This supports various SMBIOS tables type 0, 1, 2, 3, 4, 7, 8, 9, 11,
13, 16, 17, 19, 24 and 32.
SMBIOS Type 1, 2 and 3 are hardcoded as Host-BMC communication is not
supported yet. And, this module does not support fixup tables to reflect
changes of the system at booting time.
From: Vu Nguyen
Helps to show various system information like CPU info and Board Setting
values to UART console during boot process.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ard Biesheuvel
Cc: Nate DeSimone
Signed-off-by: Vu Nguyen
---
Si
From: Vu Nguyen
Provide screen menu with basic platform information include:
* Platform name
* SCP firmware info
* System bus clock frequency.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ard Biesheuvel
Cc: Nate DeSimone
Signed-off-by: Vu Nguye
This supports:
* Enable/Disable APEI Support
* Enable/Disable CPPC Support
* Enable/Disable LPI support
* Enable/Disable Max Performance Mode
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ard Biesheuvel
Cc: Nate DeSimone
Signed-off-by: Nhi Pham
-
From: Vu Nguyen
This screen is to add configuration regarding CPU. Currently, this
screen just adds a option for SubNUMA mode selection.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ard Biesheuvel
Cc: Nate DeSimone
Signed-off-by: Vu Nguyen
---
From: Vu Nguyen
Provide memory screen with below info:
* Memory total capacity
* Memory RAS and Performance Configuration
* Per DIMM Information
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ard Biesheuvel
Cc: Nate DeSimone
Signed-off-by: Vu Ngu
From: Vu Nguyen
There are secure and non-secure watchdog timers supported in the Mt.
Jade system. They are used to monitor the system booting like system
firmware, UEFI, and OS. The system will be reset if the timer expires.
So, this patch adds the configuration screen for the watchdog timer
whic
From: Vu Nguyen
This screen provide menu options to configure Max Payload and Max Read
Request size for each PCIe device under Root Port. PCIe devices which
attach to external switch are not supported yet.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
From: Quan Nguyen
This supports user to enable/disable RAS APEI components running in the
system firmware such as HEST, BERT, and EINJ.
Cc: Thang Nguyen
Cc: Chuong Tran
Cc: Phong Vo
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Ard Biesheuvel
Cc: Nate DeSimone
Signed-off-by: Quan Nguyen
--
Hi Rebecca,
This another patch submitted to add support for a built-in module "atexit" in
Py 3.6.8 UEFI port.
Would you be able to review and merge this change?
Regards,
JP
-Original Message-
From: Jayaprakash, N
Sent: 14 September 2021 20:58
To: devel@edk2.groups.io
Cc: Rebecca Cra
On Mon, Sep 13, 2021 at 9:20 PM Brijesh Singh wrote:
> +*/
> +STATIC
> +VOID
> +SevSnpGhcbRegister (
> + UINTN Address
> + )
> +{
> + MSR_SEV_ES_GHCB_REGISTER Msr;
> + MSR_SEV_ES_GHCB_REGISTER CurrentMsr;
> + EFI_PHYSICAL_ADDRESS GuestFrameNumber;
> +
> + GuestFrameNumber = Address
Reviewed-by: Rebecca Cran
Pushed as 60added7a61075607080ff718d7fa5e764a37044.
--
Rebecca Cran
On 9/14/21 9:28 AM, Jayaprakash, N wrote:
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3626
This commit adds support for the atexit a builtin module
in standard python 3.6.8 to it's UEFI p
On 9/15/21 12:08 PM, Erdem Aktas wrote:
On Mon, Sep 13, 2021 at 9:20 PM Brijesh Singh wrote:
+*/
+STATIC
+VOID
+SevSnpGhcbRegister (
+ UINTN Address
+ )
+{
+ MSR_SEV_ES_GHCB_REGISTER Msr;
+ MSR_SEV_ES_GHCB_REGISTER CurrentMsr;
+ EFI_PHYSICAL_ADDRESS GuestFrameNumber;
+
+ Guest
Update to utilize the larger variables.
Cc: Nate DeSimone
Cc: Chasel Chiu
Signed-off-by: Isaac Oram
---
Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapperPlatformLib.c
| 83 +++-
Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapper
Add PlatformSecLib
so that we can build SecCore.
This uses FSP TempRamInit API in dispatch mode, but directly
tears down NEM as a workaround because the current FSP binaries
do not properly produce the TEMP_RAM_EXIT_PPI.
Cc: Nate DeSimone
Cc: Chasel Chiu
Signed-off-by: Isaac Oram
---
Platfor
This series replaces the binary version of the SEC component with a buildable
version.
The missing PlatformSecLib instance is implemented allowing the common SecCore
component to be built. The resulting SecCore supports both Whitley and
CedarIsland platforms in both API and Dispatch FSP modes t
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3629
EFI_PEI_MM_COMMUNICATION_PPI is defined since PI spec v1.5. This patch
series added the interface definition and related GUIDs into MdePkg.
Given gEfiPeiSmmCommunicationPpiGuid and gEfiPeiMmCommunicationPpiGuid
have the same value, CI buil
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3629
MM Communication PPI was defined in PI Specification since v1.5. This
change added definition of such PPI and related GUIDs into MdePkg.
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Zhiguang Liu
Cc: Sean Brogan
Signed-off-by: Kun Qin
---
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3629
SMM Communication PPI GUID from MdeModulePkg is defined the same as MM
Communication PPI GUID from MdePkg, according to PI Spec v1.5 and onward.
After introduction of MM Communication PPI definitions, an update in the
ignore duplicate list
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3629
SMM Communication PPI GUID from MdeModulePkg is defined the same as MM
Communication PPI GUID from MdePkg, according to PI Spec v1.5 and onward.
After introduction of MM Communication PPI definitions, an update in the
ignore duplicate list
Ray:
SortLib has been added since 2015. I would suggest to still keep this
library class. To resolve the package dependency, my proposal is to move the
library class header file SortLib.h from MdeModulePkg to MdePkg, and still
keep the library instance in MdeModulePkg. This proposal has no impact
Create PR https://github.com/tianocore/edk2/pull/1977
> -邮件原件-
> 发件人: devel@edk2.groups.io 代表 gaoliming
> 发送时间: 2021年9月10日 12:52
> 收件人: devel@edk2.groups.io; mikub...@linux.microsoft.com
> 抄送: 'Jian J Wang' ; 'Dandan Bi'
>
> 主题: 回复: [edk2-devel] [PATCH v1 0/3] MdeModulePkg/Core/Pei:
> Mi
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3621
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3631
Current CPU feature initialization design:
During normal boot, CpuFeaturesPei module (inside FSP) initializes the
CPU features. During S3 boot, CpuFeaturesPei module does nothing, and
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3621
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3631
Refactor initialization of CPU features during S3 resume.
In addition, the macro ACPI_CPU_DATA_STRUCTURE_UPDATE is used to fix
incompatibility issue caused by ACPI_CPU_DATA structure
> On Sep 15, 2021, at 6:26 PM, gaoliming wrote:
>
> Ray:
> SortLib has been added since 2015. I would suggest to still keep this
> library class. To resolve the package dependency, my proposal is to move the
> library class header file SortLib.h from MdeModulePkg to MdePkg, and still
> keep
Hi EDK2 maintainers,
It has been a while since this v3 patch series were sent. May I please have
some feedback on the proposed PI spec change? Any input is appreciated.
Regards,
Kun
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View/Reply Online (#80746)
Andrew:
Thanks for your suggestion. I think your idea is better. We add new
QuickSort() API to BaseLib, and update SortLib library instance to consume
BaseLib QuickSort() API. This way has no change in current SortLib library
class. It is the compatible solution.
Thanks
Liming
发件人: Andr
Andrew, Liming,
I think your idea works better.
UefiCpuPkg --> MdePkg (BaseLib)
xxxPkg --> MdeModulePkg (SortLib) --> MdePkg (BaseLib)
Gradually we will eliminate the MdeModulePkg (SortLib) layer.
From: devel@edk2.groups.io On Behalf Of gaoliming
Sent: Thursday, September 16, 2021 10:23 AM
To:
Amy,
No. We only Add QuickSort() function API into BaseLib.h.
From: Chan, Amy
Sent: Thursday, September 16, 2021 10:46 AM
To: gaoliming ; 'Andrew Fish' ;
'edk2-devel-groups-io'
Cc: Ni, Ray ; Kinney, Michael D ;
'Gao, Liming' ; Liu, Zhiguang ;
Wang, Jian J ; Gao, Zhichao
Subject: RE: [edk2-de
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Zhang, Xiaoqiang
> Sent: Thursday, September 16, 2021 11:45 AM
> To: devel@edk2.groups.io
> Cc: Zhang, Xiaoqiang ; Chiu, Chasel
> ; Desimone, Nathaniel L
> ; Zeng, Star
> Subject: [PATCH v1] IntelFsp2WrapperPkg: Make PcdFspModeSele
Ashraf,
The layout of binary files looks good to me.
The Build.py generates the IA32 binary twice which is unnecessary.
But I think it's acceptable.
Reviewed-by: Ray Ni
-Original Message-
From: S, Ashraf Ali
Sent: Wednesday, September 15, 2021 3:25 PM
To: devel@edk2.groups.io
Cc: S, A
+ FeatureInitData = &mAcpiCpuData.CpuFeatureInitData;
+ if (FeatureInitData == NULL) {
1. It's impossible for FeatureInitData == NULL.
With this check removed, Reviewed-by: Ray Ni
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View/Reply Online (#807
SEC checks in IsSevGuest if the PCD defined WorkAreaHeader size matches the
size of the WorkAreaHeader struct definition. Set a default value for the PCD
to avoid unnecessary DSC/FDF file changes in all OVMF DSC/FDF files.
Signed-off-by: Corvin Köhne
---
OvmfPkg/Include/WorkArea.h | 4
On Thu, Sep 16, 2021 at 02:14 PM, Ni, Ray wrote:
>
> FeatureInitData = &mAcpiCpuData.CpuFeatureInitData;
Hi Ray,
Yes, agree with you, I will remove the code blow.
>
> if (FeatureInitData == NULL) {
> return;
> }
>
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Currently the realpath is used when parse modules, which shows the
path with a drive letter in build log. In Windows 'subst' comand is
used to associates a path with a drive letter, when use the mapped
drive letter for build, with realpath function the build log will
have different disk letter info
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