On 16/09/2021 17:46, Leif Lindholm wrote:
On Thu, Sep 16, 2021 at 11:40:45 +0100, Leif Lindholm wrote:
On Wed, Sep 15, 2021 at 22:55:00 +0700, Nhi Pham wrote:
From: Vu Nguyen
This commit adds the support for Ampere’s Altra processor-based Mt. Jade
platform that provides up to 160 processor co
Hi Leif,
On 16/09/2021 17:09, Leif Lindholm wrote:
Hi Nhi,
On Wed, Sep 15, 2021 at 22:54:59 +0700, Nhi Pham wrote:
This patch series adds the support for the Mt. Jade platform based on Ampere's
Altra Family Processor.
Notes:
+ The current patch series was tested with the edk2-stable202108
Hi Yao,
looks like the patch isn't formatted correctly. Could you try to apply this
patch:
From 3c22fffad51e431fbf953809215eea7022168e81 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Corvin=20K=C3=B6hne?=
Date: Fri, 17 Sep 2021 07:37:24 +0200
Subject: [PATCH] OvmfPkg: set a default value for the Wor
Hi Corvin
I try to apply this patch and merge. But I got error:
git.exe am --3way --ignore-space-change --keep-cr
"C:\home\edkii\edk2\[PATCH-v3]-OvmfPkg-set-a-default-value-for-the-WorkAreaHeader-PCD-warn.patch"
Applying: OvmfPkg: set a default value for the WorkAreaHeader PCD
Pa
Reviewed-by: Jian J Wang
Regards,
Jian
> -Original Message-
> From: Yang, Longlong
> Sent: Friday, September 17, 2021 10:51 AM
> To: devel@edk2.groups.io
> Cc: Yang, Longlong ; Yao, Jiewen
> ; Wang, Jian J ; Xu, Min M
> ; Zhang, Qi1
> Subject: [PATCH V2 1/1] SecurityPkg: Add debug log
Reviewed-by: Liming Gao
> -邮件原件-
> 发件人: Kun Qin
> 发送时间: 2021年9月16日 8:14
> 收件人: devel@edk2.groups.io
> 抄送: Michael D Kinney ; Liming Gao
> ; Zhiguang Liu ; Sean
> Brogan ; Jian J Wang
> 主题: [PATCH v1 0/3] Add MM Communication PPI definition to MdePkg
>
> REF: https://bugzilla.tianocore.
Is there any other case to use RealPath in BaseTools? Or, have you confirm
that all RealPath usage have been removed?
Liming
> -邮件原件-
> 发件人: Yuwei Chen
> 发送时间: 2021年9月16日 14:59
> 收件人: devel@edk2.groups.io
> 抄送: Bob Feng ; Liming Gao
>
> 主题: [PATCH 1/1] BaseTools: Change RealPath to AbsPa
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Oram, Isaac W
> Sent: Thursday, September 16, 2021 3:05 AM
> To: devel@edk2.groups.io
> Cc: Desimone, Nathaniel L ; Chiu, Chasel
>
> Subject: [edk2-devel][edk2-platforms][PATCH V1 2/2]
> WhitleyOpenBoardPkg/SecCore: Add SecCore sou
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Oram, Isaac W
> Sent: Thursday, September 16, 2021 3:05 AM
> To: devel@edk2.groups.io
> Cc: Desimone, Nathaniel L ; Chiu, Chasel
>
> Subject: [edk2-devel][edk2-platforms][PATCH V1 1/2]
> WhitleySiliconPkg/FspWrapperPlatformLib: Upd
Series pushed as
38b2e75e94f5fe234ccaf80dc3b33b34a68486cf..64394fd2b48f403330feb8f7e954d1cca0822af5
-Original Message-
From: Desimone, Nathaniel L
Sent: Thursday, September 16, 2021 2:25 PM
To: Oram, Isaac W ; devel@edk2.groups.io
Cc: Chiu, Chasel
Subject: RE: [edk2-devel][edk2-platfor
For the series...
Reviewed-by: Nate DeSimone
-Original Message-
From: Oram, Isaac W
Sent: Wednesday, September 15, 2021 12:05 PM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Chiu, Chasel
Subject: [edk2-devel][edk2-platforms][PATCH V1 0/2] Whitley SEC support
This series repl
From: Stefan Berger
Disable the TPM2 platform hierarchy by directly calling
ConfigureTpmPlatformHierarchy().
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Gerd Hoffmann
Signed-off-by: Stefan Berger
---
ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBm.c | 6 ++
.../
From: Stefan Berger
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Gerd Hoffmann
Signed-off-by: Stefan Berger
---
ArmVirtPkg/ArmVirtCloudHv.dsc | 1 +
ArmVirtPkg/ArmVirtQemu.dsc | 2 ++
ArmVirtPkg/ArmVirtQemuK
From: Stefan Berger
Add a NULL implementation of the library class TpmPlatformHierarchyLib.
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Gerd Hoffmann
Signed-off-by: Stefan Berger
---
ArmVirtPkg/ArmVirtPkg.dec | 1 +
.../Include/Library/TpmPlatformHierarch
This series of patches disables the TPM 2 platform hierarchy.
We just added the same functionality to the OvmfPkg. However, on x86, we
could use the notification mechanism around gEfiDxeSmmReadyToLockProtocolGuid
to indirectly invoke ConfigureTpmPlatformHierarchy(). Since ARM does not
have an SMM m
Is it a big increase in messages to have both INFO and LOAD?
-Original Message-
From: Oram, Isaac W
Sent: Wednesday, September 8, 2021 3:35 PM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Chiu, Chasel
Subject: [edk2-devel][edk2-platforms][PATCH V1 1/1] WhitleyOpenBoardPkg/Build
Pushed: https://github.com/tianocore/edk2-platforms/commit/2cd3be4
-Original Message-
From: Oram, Isaac W
Sent: Wednesday, September 8, 2021 3:30 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L
; Liming Gao ; Dong,
Eric
Subject: [edk2-devel][edk2-platforms][PATCH
Reviewed-by: Nate DeSimone
-Original Message-
From: devel@edk2.groups.io On Behalf Of Oram, Isaac W
Sent: Wednesday, September 8, 2021 3:30 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L
; Liming Gao ; Dong,
Eric
Subject: [edk2-devel][edk2-platforms][PATCH V1 1/1
I was looking for anything that wouldn't include reading register but only
thing that distinguish device PCI_IO_DEVICE instances with root bridge
instances is population of BusNumberRanges structure.
This technically could be used since this is populated only for root bridges
and not devices but
Just to double confirm, will we have the null instance of QuickSort in MdePkg?
Regards,
Amy
From: gaoliming
Sent: Thursday, September 16, 2021 10:23 AM
To: 'Andrew Fish' ; 'edk2-devel-groups-io'
Cc: Ni, Ray ; Kinney, Michael D ;
'Gao, Liming' ; Liu, Zhiguang ;
Wang, Jian J ; Gao, Zhichao ;
Not needed for qemu 1.7 (released in 2013) and newer.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3593
Signed-off-by: Gerd Hoffmann
---
OvmfPkg/PlatformPei/MemDetect.c | 59 +++--
1 file changed, 4 insertions(+), 55 deletions(-)
diff --git a/OvmfPkg/PlatformP
Prefer the e820 map provided via qemu firmware config interface
for memory detection. Use rtc cmos only as fallback, which should
be rarely needed these days as qemu supports etc/e820 since 2013.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3593
Signed-off-by: Gerd Hoffmann
Reviewed-by: P
Add a bool parameter to ScanOrAdd64BitE820Ram to explicitly specify
whenever ScanOrAdd64BitE820Ram should add HOBs for high memory (above
4G) or scan only.
Also add a lowmem parameter so ScanOrAdd64BitE820Ram
can report the memory size below 4G.
This allows a more flexible usage of ScanOrAdd64Bit
Don't use cmos for memory detection if possible.
qemu provides the etc/e820 firmware config file
as alternative since 2013.
v2:
- fix lowmem detection.
- pick up review tags.
- add rfc patch to completely drop cmos support.
v3:
- fix CI failure.
Gerd Hoffmann (3):
OvmfPkg/PlatformPei: Scan
On Thu, Sep 16, 2021 at 04:45:29 -0600, Rebecca Cran wrote:
> Reviewed-by: Rebecca Cran
>
>
> --
>
> Rebecca Cran
>
>
> On 9/15/21 7:55 AM, Nhi Pham wrote:
> > According to SMBIOS 3.4, section 7.5.3.3 ARM64-class CPUs, if
> > SMCCC_ARCH_SOC_ID is supported, the first DWORD is the JEP-106 code
From: Marc Moisson-Franckhauser
Bugzilla: 3378 (https://bugzilla.tianocore.org/show_bug.cgi?id=3378)
This option informs the parser to generate a dot graph of a table.
This can be useful to understand or debug a table, such as the PPTT
table.
Signed-off-by: Joey Gouly
---
ShellPkg/Library/Uef
This series adds functionality to print a dot graph of a PPTT table.
This helps with understanding and debugging PPTT tables.
The dot graph generator functionality is generic and could be used by
other tables that would benefit from graph output.
Bugzilla: 3378 (https://bugzilla.tianocore.org/show
From: Marc Moisson-Franckhauser
Bugzilla: 3378 (https://bugzilla.tianocore.org/show_bug.cgi?id=3378)
This is preparation for adding a second flag to the parsers.
Signed-off-by: Joey Gouly
---
ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiParser.h | 77
+++-
Sh
From: Marc Moisson-Franckhauser
Bugzilla: 3378 (https://bugzilla.tianocore.org/show_bug.cgi?id=3378)
These can be used to generate dot files, that can be used to visualise
graphs in tables, such as PPTT.
Signed-off-by: Joey Gouly
---
ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiV
From: Marc Moisson-Franckhauser
Bugzilla: 3378 (https://bugzilla.tianocore.org/show_bug.cgi?id=3378)
This generates a dot file from the PPTT table that can be used to
visualise the topology of the CPUs and Caches.
Signed-off-by: Joey Gouly
---
ShellPkg/Library/UefiShellAcpiViewCommandLib/Pars
From: Marc Moisson-Franckhauser
Bugzilla: 3378 (https://bugzilla.tianocore.org/show_bug.cgi?id=3378)
This new helper will not overwrite existing files, by appending a number
to the end of the filename.
Signed-off-by: Joey Gouly
---
ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiView.h | 25
This will also help with PE file alignment in FD, as SecCore no longer
needs to be pinned to the very top. Thank you!
Best regards,
Marvin
On 16/09/2021 16:26, Ashraf Ali S wrote:
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3492
Currently SecCore.inf having the resetvector code under I
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3492
Currently SecCore.inf having the resetvector code under IA32. if the
user wants to use both SecCore and UefiCpuPkg ResetVector it's not
possible, since SecCore and ResetVector(VTF0.INF/ResetVector.inf)
are sharing the same GUID which is BFV.
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PRODID:-//Groups.io Inc//Groups.io Calendar//EN
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TZID:Asia/Shanghai
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Hi., Ray
We cannot add ResetVector1G.inf in the DSC file since FILE_GUID should be the
VTF GUID.
So it's better to be added in the YAML file as we were doing for
FixupVtf/Vtf.inf.
Regards,
Ashraf Ali S
Intel Technology India Pvt. Ltd.
-Original Message-
From: Ni, Ray
Sent: Thursday,
Reviewed-by: Ray Ni
I merged the patch with the "#ifndef .." removed.
> -Original Message-
> From: Lou, Yun
> Sent: Thursday, September 16, 2021 5:27 PM
> To: devel@edk2.groups.io
> Cc: Lou, Yun ; Ni, Ray ; Dong, Eric
> ; Laszlo Ersek
> ; Kumar, Rahul1
> Subject: [PATCH v2 1/2] UefiCp
Reviewed-by: Ray Ni
> -Original Message-
> From: Lou, Yun
> Sent: Thursday, September 16, 2021 5:27 PM
> To: devel@edk2.groups.io
> Cc: Lou, Yun ; Ni, Ray ; Dong, Eric
> ; Laszlo Ersek
> ; Kumar, Rahul1
> Subject: [PATCH v2 2/2] UefiCpuPkg: Prevent from re-initializing CPU features
>
Wait a sec. I think you don't need to edit yaml file. You can directly include
the new INF to DSC file.
-Original Message-
From: devel@edk2.groups.io On Behalf Of Ni, Ray
Sent: Thursday, September 16, 2021 8:40 PM
To: S, Ashraf Ali ; devel@edk2.groups.io
Cc: Kumar, Rahul1 ; De, Debkumar
Reviewed-by: Ray Ni
-Original Message-
From: S, Ashraf Ali
Sent: Thursday, September 16, 2021 8:07 PM
To: devel@edk2.groups.io
Cc: S, Ashraf Ali ; Ni, Ray ; Kumar,
Rahul1 ; De, Debkumar ; Han,
Harry ; West, Catharine ; V,
Sangeetha ; Chaganty, Rangasai V
; Dureja, Sahil
Subject: [P
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
OvmfPkg/Microvm/README | 54 ++
1 file changed, 54 insertions(+)
create mode 100644 OvmfPkg/Microvm/README
diff --git a/OvmfPkg/Microvm/README
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Reviewed-by: Jiewen Yao
---
Maintainers.txt | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Maintainers.txt b/Maintainers.txt
index 41f491bcaed1..52f9aa99ac7d 100644
--- a/Maintainers.txt
+++ b/Mainta
Microvm has no LPC bridge, so drop the PciSioSerialDxe driver.
Use SerialDxe instead, with ioport hardcoded to 0x3f8 aka com1 aka ttyS0.
With this tianocore boots to uefi shell prompt on the serial console.
Direct kernel boot can be used too.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=35
Shortcut PCI support for now (proper PCIe
support will be wired up later).
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
OvmfPkg/Microvm/MicrovmX64.dsc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/OvmfPkg/Mi
Nothing to do here ;)
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c
b
Uses the generic event device to reset and poweroff.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
OvmfPkg/Microvm/MicrovmX64.dsc| 14 +--
.../BaseResetSystemLibMicrovm.inf | 37
.../DxeResetSy
Set PcdOvmfHostBridgePciDevId to MICROVM_PSEUDO_DEVICE_ID.
Return and skip i440fx/q35 chipset tweaks.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
OvmfPkg/PlatformPei/Platform.c | 6 ++
1 file changed, 6 insertions(+)
diff -
This patch series adds basic support for the
microvm machine type to OVMF.
Working:
- uefi shell @ serial console.
- direct kernel boot.
Comming in followup patches:
- virtio-mmio support.
- pcie support.
Usage:
qemu-system-x86_64 -nographic -M microvm -bios MICROVM.fd ...
v2 changes:
Microvm needs ioapic hobs only.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
OvmfPkg/PlatformPei/Platform.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
Set mHostBridgeDevId to MICROVM_PSEUDO_DEVICE_ID using a
compile time switch.
Skip host bridge setup on microvm.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
OvmfPkg/Microvm/MicrovmX64.dsc | 3 +++
OvmfPkg/PlatformPei/MemDetect
Signed-off-by: Gerd Hoffmann
---
OvmfPkg/Include/IndustryStandard/Microvm.h | 12
1 file changed, 12 insertions(+)
create mode 100644 OvmfPkg/Include/IndustryStandard/Microvm.h
diff --git a/OvmfPkg/Include/IndustryStandard/Microvm.h
b/OvmfPkg/Include/IndustryStandard/Microvm.h
new
Microvm has no acpi timer, so go use XenTimerDxe
which uses the local apic instead.
Set PcdFSBClock to 1000 MHz, which is the lapic
timer frequency used by KVM.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
OvmfPkg/Microvm/Microv
Microvm has no acpi timer, so use the generic lib instead.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
OvmfPkg/Microvm/MicrovmX64.dsc | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/OvmfPkg/Microvm/Mi
Microvm focus is virtio, so go drop support
for emulated scsi host adapters.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
OvmfPkg/Microvm/MicrovmX64.dsc | 9 -
OvmfPkg/Microvm/MicrovmX64.fdf | 9 -
2 files changed
Microvm has no TPM support.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Reviewed-by: Stefan Berger
Acked-by: Jiewen Yao
---
OvmfPkg/Microvm/MicrovmX64.dsc | 76 +-
OvmfPkg/Microvm/MicrovmX64.fdf | 18
2 files ch
Guests depending on BIOS will probably not work that well with microvm
due to legacy hardware being not available.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
OvmfPkg/Microvm/MicrovmX64.dsc | 26 --
OvmfP
Microvm has no SEV support.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
OvmfPkg/Microvm/MicrovmX64.dsc | 1 -
OvmfPkg/Microvm/MicrovmX64.fdf | 2 --
2 files changed, 3 deletions(-)
diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/
Without SMM secure boot isn't actually secure, so drop it too.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
OvmfPkg/Microvm/MicrovmX64.dsc | 15 ---
OvmfPkg/Microvm/MicrovmX64.fdf | 4
2 files changed, 19 deleti
Microvm has no SMM support.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
OvmfPkg/Microvm/MicrovmX64.dsc | 86 +-
OvmfPkg/Microvm/MicrovmX64.fdf | 30
2 files changed, 1 insertion(+), 1
Create Microvm subdirectory. Copy OvmfPkgX64 .dsc and .fdf files
unmodified as starting point for MicrovmX64.
Changes come as separate patches, to simplify patch review and rebases.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
Rename the firmware volume files (s/OVMF/MICROVM/).
Fix includes so they work with microvm config being in a subdirectory.
With this patch applied the build works.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann
Acked-by: Jiewen Yao
---
OvmfPkg/Microvm/Micr
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3473
X64 Reset Vector Code can access the memory range till 4GB using the
Linear-Address Translation to a 2-MByte Page, when user wants to use
more than 4G using 2M Page it will leads to use more number of Page
table entries. using the 1-GByte Pag
On Wed, Sep 15, 2021 at 22:55:03 +0700, Nhi Pham wrote:
> The FailSafeDxe is a driver for the FailSafe feature which reverts the
> system's configuration to known good values if the system fails to boot
> up multiple times. Also, this driver implements the Watchdog Timer
> Architectural Protocol to
On 9/16/21 3:58 AM, Gerd Hoffmann wrote:
> Hi,
>
>> + ## The range of memory that need to be pre-validated in the SEC phase
>> + # when SEV-SNP is active in the guest VM.
>> + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecPreValidatedStart|0|UINT32|0x56
>> + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnp
On 9/16/21 3:33 AM, Gerd Hoffmann wrote:
> On Mon, Sep 13, 2021 at 01:19:21PM -0500, Brijesh Singh wrote:
>> BZ:
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3275&data=04%7C01%7Cbrijesh.singh%40amd.com%7C6495c28531da4bc30ce508d
On 9/16/21 3:30 AM, Gerd Hoffmann wrote:
> Hi,
>
>> Good point, there is no reason to read and restore the old GHCB, I will
>> remove it in next version. The function does not set this as a GHCB address,
>> it send request to hypervisor saying that it would like to use this address.
>> If hyper
On 9/16/21 3:26 AM, Gerd Hoffmann via groups.io wrote:
> Hi,
>
>> +; GHCB page table
>> +GhcbPageTable:
>> + DD GHCB_PT_ADDR
>> + DD GHCB_PT_SIZE
>> + DD OVMF_SECTION_TYPE_SEC_MEM
> Hmm, TDX will re-use those pages for something else. So as long as TDX
> is happy with OVMF_SECTION_TYPE_S
On Thu, Sep 16, 2021 at 11:40:45 +0100, Leif Lindholm wrote:
> On Wed, Sep 15, 2021 at 22:55:00 +0700, Nhi Pham wrote:
> > From: Vu Nguyen
> >
> > This commit adds the support for Ampere’s Altra processor-based Mt. Jade
> > platform that provides up to 160 processor cores in a dual socket
> > con
On 9/16/21 3:07 AM, Gerd Hoffmann wrote:
> Hi,
>
>> +; The section contains the hypervisor pre-populated CPUID values. In the
>> +; case of SEV-SNP, the CPUID values are filtered and measured by the SEV-SNP
>> +; firmware.
> Pointer to the struct spec would be nice here,
Noted.
thanks
-=-=
Reviewed-by: Rebecca Cran
--
Rebecca Cran
On 9/15/21 7:55 AM, Nhi Pham wrote:
According to SMBIOS 3.4, section 7.5.3.3 ARM64-class CPUs, if
SMCCC_ARCH_SOC_ID is supported, the first DWORD is the JEP-106 code and
the second DWORD is the SoC revision value. But in the current
implementation,
On Wed, Sep 15, 2021 at 22:55:00 +0700, Nhi Pham wrote:
> From: Vu Nguyen
>
> This commit adds the support for Ampere’s Altra processor-based Mt. Jade
> platform that provides up to 160 processor cores in a dual socket
> configuration. The essential modules are wired up enough to boot system
> to
Hi Nhi,
On Wed, Sep 15, 2021 at 22:54:59 +0700, Nhi Pham wrote:
> This patch series adds the support for the Mt. Jade platform based on Ampere's
> Altra Family Processor.
>
> Notes:
> + The current patch series was tested with the edk2-stable202108 tag.
+ the added common functions in Emb
Hi,
https://github.com/tianocore/edk2/pull/1979 detected errors.
Can you check and update a new patch to fix?
Thanks,
Ray
-Original Message-
From: devel@edk2.groups.io On Behalf Of Ni, Ray
Sent: Thursday, September 16, 2021 1:58 PM
To: S, Ashraf Ali ; devel@edk2.groups.io
Cc: Kumar, Rahu
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3621
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3631
Refactor initialization of CPU features during S3 resume.
In addition, the macro ACPI_CPU_DATA_STRUCTURE_UPDATE is used to fix
incompatibility issue caused by ACPI_CPU_DATA structure
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3621
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3631
Current CPU feature initialization design:
During normal boot, CpuFeaturesPei module (inside FSP) initializes the
CPU features. During S3 boot, CpuFeaturesPei module does nothing, and
Brijesh, thank you for looking into this now!
-Original Message-
From: Gerd Hoffmann
Sent: Thursday, September 16, 2021 5:16 PM
To: Brijesh Singh
Cc: devel@edk2.groups.io; Ni, Ray ; James Bottomley
; Xu, Min M ; Yao, Jiewen
; Tom Lendacky ; Justen, Jordan
L ; Ard Biesheuvel ;
Erdem
On Tue, Sep 14, 2021 at 09:21:50AM -0500, Brijesh Singh wrote:
> Hi Ray,
>
> I was hoping that refactor can be done later but sounds like we want to
> do it before the SNP. Let me look into it.
Well, the problem with the "do it later" approach is that these tasks
then tend to fall down to the bot
Hi all,
I just delete Trailing whitespaces of a blank line in this version of patch.
Besides, this script has been tested and can successfully build
UniversalPayload on both windows and linux.
Thanks,
Dun
-Original Message-
From: devel@edk2.groups.io On Behalf Of duntan
Sent: Thursday,
V1: Add script to build UniversalPayload, which can be used after edksetup
rebuild
The final UPL.elf will be located at root folder of edk2
V2: Revise the ouput directory of generated files and coding style in the script
Cc: Guo Dong
Reviewed-by: Ray Ni
Cc: Maurice Ma
Cc: Benjamin You
Cc: Zh
SEC checks in IsSevGuest if the PCD defined WorkAreaHeader size
matches the size of the WorkAreaHeader struct definition. Set a
default value for the PCD to avoid unnecessary DSC/FDF file
changes in all OVMF DSC/FDF files.
Signed-off-by: Corvin Köhne
Reviewed-by: Jiewen Yao
---
OvmfPkg/Include/
Hi,
> + ## The range of memory that need to be pre-validated in the SEC phase
> + # when SEV-SNP is active in the guest VM.
> + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecPreValidatedStart|0|UINT32|0x56
> + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecPreValidatedEnd|0|UINT32|0x57
I guess TDX need
Reviewed-by: Jiewen Yao
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Corvin
> Köhne
> Sent: Thursday, September 16, 2021 2:22 PM
> To: devel@edk2.groups.io
> Cc: ardb+tianoc...@kernel.org; Yao, Jiewen ; Justen,
> Jordan L ; kra...@redhat.com; rebe...@bsdio.com;
> gre...
On Mon, Sep 13, 2021 at 01:19:21PM -0500, Brijesh Singh wrote:
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275
>
> The SEV-SNP guest requires that GHCB GPA must be registered before using.
> See the GHCB specification section 2.3.2 for more details.
Already done in SEC phase (patch #9),
Hi,
> Good point, there is no reason to read and restore the old GHCB, I will
> remove it in next version. The function does not set this as a GHCB address,
> it send request to hypervisor saying that it would like to use this address.
> If hypervisor is not okay with the address then it may rec
Hi,
> +; GHCB page table
> +GhcbPageTable:
> + DD GHCB_PT_ADDR
> + DD GHCB_PT_SIZE
> + DD OVMF_SECTION_TYPE_SEC_MEM
Hmm, TDX will re-use those pages for something else. So as long as TDX
is happy with OVMF_SECTION_TYPE_SEC_MEM everything should work fine and
just mentioning that in the c
Hi,
> +; The section contains the hypervisor pre-populated CPUID values. In the
> +; case of SEV-SNP, the CPUID values are filtered and measured by the SEV-SNP
> +; firmware.
Pointer to the struct spec would be nice here,
take care,
Gerd
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receiv
> typedef struct _CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER {
>UINT8 GuestType;
> - UINT8 Reserved1[3];
> + UINT8 SubType;
> + UINT8 Reserved1[2];
> } CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER;
I think we should use the s
On Tue, Sep 14, 2021 at 03:49:31AM +, Yao, Jiewen wrote:
> I can explain why we prefer DQ instead of DD.
>
> You are right that current TD entrypoint is 32bit. However, we cannot predict
> that is always TRUE for the future.
So a "save space in MEMFD" vs. "be future proof" tradeoff.
> Back
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