On Fri, Nov 17, 2023 at 10:39:13PM +0100, Laszlo Ersek wrote:
> On 11/17/23 12:42, Gerd Hoffmann wrote:
> > On Fri, Nov 17, 2023 at 10:16:10AM +0100, Laszlo Ersek wrote:
> >> (+Liming +Mike)
> >>
> >> On 11/16/23 10:01, Gerd Hoffmann wrote:
> >>> On Wed, Nov 15, 2023 at 11:51:53AM -0600, Michael Ro
Bhyve uses an io port range of [ 0x2000, 0x1 ] [1]. At the moment,
EDKII is using a subset of this range [ 0xC000, 0x1 ] [2]. Even
though the EDKII range doesn't exceed the bhyve range, it's causing
issues on some guests like OpenBSD [3]. We don't know why it's causing
issues yet. However,
On Fri, 2023-11-17 at 17:09 +0100, Laszlo Ersek wrote:
> On 11/17/23 13:43, Corvin Köhne wrote:
> > Bhyve uses an io port range of [ 0x2000, 0x1 ] [1]. At the
> > moment,
> > EDKII is using a subset of this range [ 0xC000, 0x1 ] [2]. Even
> > though the EDKII range doesn't exeed the bhyve r
Thanks Laszlo. Will fix all comments next version.
Thanks
Jianyong
> -Original Message-
> From: Laszlo Ersek
> Sent: 2023年11月18日 5:54
> To: devel@edk2.groups.io; Jianyong Wu ; Sami
> Mujawar
> Cc: ardb+tianoc...@kernel.org
> Subject: Re: [edk2-devel] [PATCH] CloudHv: Add CI for CloudHv
Hi Mike and Liming
Do you have time to take a look this update?
V3: https://edk2.groups.io/g/devel/message/110197
Pull Request: https://github.com/tianocore/edk2/pull/4970
Best Regards
Fan
-Original Message-
From: Wang, Fan
Sent: Friday, October 27, 2023 4:24 PM
To: Kinney, Michael D ;
Did you mean to add it as a memory type by itself like
EFI_MEMORY_TYPE_INFORMATION?
My interpretation of Memory Type is that it is more of SW usability
construct while Memory Attr is more of HW behavioural construct. Together
they define how a memory region can be used.
On Fri, Nov 17, 2023 at 1:5
Hi Ray and Laszlo,
Thanks a lot for the feedbacks.
Please have a review on the patch v6 which:
-Kept execute disable bit both in MpExchangeInfo and CpuMpData.
-Added another patch in which I updated the comments of CpuMpData.
Regards
Yuanhao Xie
-Original Message-
From: Laszlo Ersek
No functional changes in this patch.
Updated the comments of _CPU_MP_DATA to delcared that duplications in
CpuMpData are present to avoid to be direct accessed and comprehended
in assembly code. CpuMpData: Intended for use in C code while
ExchangeInfo are used in assembly code in this module.
S
From: Yuanhao Xie
This patch synchronizes the No-Execute bit in the IA32_EFER
register for the APs before the RestoreVolatileRegisters operation.
The commit 964a4f0, titled "Eliminate the second INIT-SIPI-SIPI
sequence," replaces the second INIT-SIPI-SIPI sequence with the BSP
calling the Switch
This patch series synchronizes the No-Execute bit in the IA32_EFER
register for the APs before the RestoreVolatileRegisters operation.
It also updated the comments of _CPU_MP_DATA to delcared that
duplications in CpuMpData are present to avoid to be direct accessed
and comprehended in assembly code
[AMD Official Use Only - General]
Yes Laszlo, we need one for this.
Hi Igor, do you have an account on Bugzilla? We need a ticket for this issue.
Thnaks
Abner
> -Original Message-
> From: Laszlo Ersek
> Sent: Friday, November 17, 2023 5:11 PM
> To: devel@edk2.groups.io; ig...@ami.com; C
As per ACPI Spec 6.5+ Table 5-9 if xDSDT is avaialble,
it should be used first. Handle required flow when xDSDT
is abscent or present.
Test: Tested on RISCV64 Qemu platform with xDSDT and booted to
linux kernel.
Cc: Liming Gao
Cc: Zhiguang Liu
Cc: Dandan Bi
Signed-off-by: Dhaval Sharma
---
N
Enable detection of XDSDT table from ACPI HOB and use it to comply
with ACPI spec 6.5+ Table 5-9.
Dhaval (1):
MdeModulePkg: Fix issue with ACPI table creation
MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c | 22
+---
1 file changed, 15 insertions(+), 7 deletions(
As per ACPI Spec 6.5+ Table 5-9 if xDSDT is avaialble,
it should be used first. Handle required flow when xDSDT
is abscent or present.
Test: Tested on RISCV64 Qemu platform with xDSDT and booted to
linux kernel.
Cc: Liming Gao
Cc: Zhiguang Liu
Cc: Dandan Bi
Signed-off-by: Dhaval Sharma
---
N
Enable detection of XDSDT table from ACPI HOB and use it to comply
with ACPI spec 6.5+ Table 5-9.
Dhaval (1):
MdeModulePkg: Fix issue with ACPI table creation
MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c | 22
+---
1 file changed, 15 insertions(+), 7 deletions(
This patch series synchronizes the No-Execute bit in the IA32_EFER
register for the APs before the RestoreVolatileRegisters operation.
It also updated the comments of _CPU_MP_DATA to delcared that
duplications in CpuMpData are present to avoid to be direct accessed
and comprehended in assembly code
From: Yuanhao Xie
This patch synchronizes the No-Execute bit in the IA32_EFER
register for the APs before the RestoreVolatileRegisters operation.
The commit 964a4f0, titled "Eliminate the second INIT-SIPI-SIPI
sequence," replaces the second INIT-SIPI-SIPI sequence with the BSP
calling the Switch
No functional changes in this patch.
Updated the comments of _CPU_MP_DATA to delcared that duplications in
CpuMpData are present to avoid to be direct accessed and comprehended
in assembly code. CpuMpData: Intended for use in C code while
ExchangeInfo are used in assembly code in this module.
S
On Wed, Nov 15, 2023 at 3:20 PM Laszlo Ersek wrote:
> On 11/14/23 17:21, Kinney, Michael D wrote:
> > Hi Ranbir,
> >
> >
> >
> > First I want to recognize your efforts to collect Coverity issues and
> > propose changes to address
> > them.
> >
> > I still disagree with adding CpuDealLoop() for an
The microcode loading during Mp initialization of the DXE stage can be
removed regardless of bit mode.
Cc: Ray Ni ray...@intel.com
Cc: Eric Dong eric.d...@intel.com
Cc: Rahul Kumar rahul1.ku...@intel.com
Cc: Tom Lendacky thomas.lenda...@amd.com
Cc: Laszlo Ersek ler...@redhat.com
Signed-off-by: Yua
Hi Anderi,
There are indeed typos and I will fix them in V4. Thank you!
Thanks,
Chao
On 2023/11/18 04:18, Andrei Warkentin wrote:
+Tuan as a heads-up.
This seems reasonable to me. What does the "Uint" mean in
ConfigureMemoryManagementUint?
Did you intend to say "Unit"?
Reviewed-by: Andrei
Hi Leif,
Do you mean that CpuIo2Dxe adds MMIO method first, then waits for this
patch series to be merged, and finally makes a new BZ and remove the ARM
version?
Thanks,
Chao
On 2023/11/17 21:13, Leif Lindholm wrote:
On Fri, Nov 17, 2023 at 18:01:39 +0800, Chao Li wrote:
ArmPciCpuIo2Dxe ha
Thanks Laszlo for the comments.
To avoid using MpService Protocol, and also for S3 boot flow, the newer version
of patch chooses to use global variable gSmmCpuPrivate instead of WhoAmI.
Please help review [PATCH v2] UefiCpuPkg/PiSmmCpuDxeSmm: Use NonSmm BSP as
default SMM BSP.
Thanks
Zhiguang
>
Currently, if BSP election is not enabled, will use Core0 as SMM BSP.
However, Core0 does not always have the highest performance.
So, we can used NonSmm BSP as default BSP.
This will take effect in normal SMM init flow and S3 boot flow
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Laszlo Er
Hi Leif,
There are indeed typos and I will fix them in V4. Thank you!
Thanks,
Chao
On 2023/11/17 19:35, Leif Lindholm wrote:
Not my package, just spotted a typo below:
On Fri, Nov 17, 2023 at 17:59:49 +0800, Chao Li wrote:
Since some ARCH or platform not require execute code on memory during
Hi Andrei,
Yes, the RISCV version is same as the ArmPkg version. The ArmPkg version
is almost similar to UefiCpuPkg version, excapt that UefiCpuPkg version
doesn't have MMIO methods on CpuIoServiceRead and CpuIoServiceWrite, the
MMIO methods have been added in the patch 20, please check.
Th
Since the UefiCpuPkg/CpuIo2Dxe already supports MMIO, it is enabled at
this thime.
Build-tested only (with "RiscVVirtQemu.dsc").
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Sunil V L
Cc: Andrei Warkentin
---
OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 4 +++-
OvmfPkg/RiscVVirt/RiscV
Reviewed-by: Ray Ni
Thanks,
Ray
From: mikub...@linux.microsoft.com
Sent: Wednesday, November 15, 2023 4:22 AM
To: devel@edk2.groups.io
Cc: Andrew Fish ; Ni, Ray
Subject: [PATCH v1 2/3] EmulatorPkg: Format with Uncrustify 73.0.8
From: Michael Kubacki
Cc: Andr
Laszlo,
Welcome!
Thanks for monitoring the changes in UefiCpuPkg. I appreciate your efforts on
improving the code quality of UefiCpuPkg.
Reviewed-by: Ray Ni
Thanks,
Ray
From: Laszlo Ersek
Sent: Friday, November 17, 2023 5:50 AM
To: devel@edk2.groups.io
Cc: And
Hi, Michael:
Got it.
It seems linux kernel has introduced PRMT support default.
And ARM vendors usually use this PRMT mechnism.
So how aout x86 platform?
Does Win11 have supported PRMT on any X86 platform?
best wishes,
At 2023-11-18 00:04:26, "Michael Kubacki" wrote:
>On 11/17/2
let me add more to explain:
1. CPUID.0B.PackageId == CPUID.1F.PackageId
SDM clearly states the scope of every MSR (public): package, core, or thread.
But SDM doesn't emphasize that if a MSR is package scope, it's within the
package defined by CPUID.0B or CPUID.1F.
That implies, CPUID.0B and CPUI
As per Smbios 3.7.0 spec, added CXL 3.0 support in Type 9, also added
PMIC & RCD manufacturer ID and Revision information in Type17.
Signed-off-by: Shenbagadevi R
CC: Gaoliming
CC: Sainadh N
CC: Sundaresan S
CC: Srinivasan M
CC: Ramesh R
---
MdePkg/Include/IndustryStandard/SmBios.h | 11 +
Signed-off-by: Daniel Nguyen
---
.../UefiShellLevel2CommandsLib/Reset.c| 43 +++
1 file changed, 24 insertions(+), 19 deletions(-)
diff --git a/ShellPkg/Library/UefiShellLevel2CommandsLib/Reset.c
b/ShellPkg/Library/UefiShellLevel2CommandsLib/Reset.c
index 57ba3c90f3..361
Hi team,
Please help with the build error in BOOT.MXF.1.1.1. The command and log are
listed below.
Sync & build command:
1. python sync_crm.py BOOT.MXF.1.1.1-00175-Olympic-1
2. copy manifest to my local sync (copy
\\snowcone\builds906\PROD\BOOT.MXF.1.1.1-00175-Olympic-1\boot_images\boot_
Hi all,
I am trying to build EDK2 from most recent Github (namely, EmulatorPkg) with
the new Stuart build system on Windows 10 22H2 64 bit with VS 2019. I'm getting
the following error which directed me to this mailing list. More details on my
build process below.
INFO - build.py...
INFO -
*Reminder: Tools, CI, Code base construction meeting series*
*When:*
Monday, November 20, 2023
4:30pm to 5:30pm
(UTC-08:00) America/Los Angeles
*Where:*
https://teams.microsoft.com/l/meetup-join/19%3ameeting_ZDI2ZDg4NmMtMjI1My00MzI5LWFmYjAtMGQyNjUzNTBjZGYw%40thread.v2/0?context=%7b%22Tid%22%3a%22
Laszlo and Gerd:
I agree this is a critical bug fix. If it plans to catch this stable tag, I
am OK.
Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io 代表 Laszlo Ersek
> 发送时间: 2023年11月18日 5:39
> 收件人: devel@edk2.groups.io; kra...@redhat.com
> 抄送: Michael Roth ; Ray Ni ;
> Erdem Aktas ;
37 matches
Mail list logo
