On Wed, Dec 6, 2023 at 7:37 PM Oliver Smith-Denny
wrote:
>
> My first caveat here is I am writing this email from the depths of a
> parental leave, so my brain is only half here and I haven't been up to
> date for the past two months :). I'll return in Jan and hopefully be
> a bit more sensical.
(cc Liming)
On Thu, 7 Dec 2023 at 05:48, Neal Gompa wrote:
>
> On Fri, Nov 24, 2023 at 6:36 PM Neal Gompa wrote:
> >
> > On Thu, Nov 2, 2023 at 6:35 AM Laszlo Ersek wrote:
> > >
> > > On 10/31/23 23:27, Jeremy Linton wrote:
> > > > On 10/31/23 12:37, Neal Gompa via groups.io wrote:
> > > >>
Consume MpInfo2Hob in PiSmmCpuDxe driver to get
NumberOfProcessors, MaxNumberOfCpus and
EFI_PROCESSOR_INFORMATION for all CPU from the
MpInformation2 HOB.
This can avoid calling MP service.
Signed-off-by: Dun Tan
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
---
Modify the gSmmBaseHobGuid consumption code to
remove the asuumption that there is only one
gSmmBaseHobGuid. If the CPU number is big enough,
there will be more than one SmmBaseHob in the
HOB list.
Signed-off-by: Dun Tan
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
---
Cache core type in MpInfo2 HOB by CpuMpPei module.
Signed-off-by: Dun Tan
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
---
UefiCpuPkg/CpuMpPei/CpuMpPei.c | 59
+--
UefiCpuPkg/CpuMpPei/CpuMpPei.h | 2 ++
2 files changed,
Create gMpInformationHobGuid2 in UefiCpuPkg.
Currently, there is a gMpInformationHobGuid defined,
created and consumed only in StandaloneMmPkg. The HOB
contains the EFI_PROCESSOR_INFORMATION structure for
each CPU and the number of processors. This is the same
as the information that
Build MpInfo2HOB in CpuMpPei module so that later
PiSmmCpuDxe or other StandaloneMm module can consume
the HOB.
Since there might be more one gMpInformationHobGuid2
in HOB list, CpuMpPei create a gMpInformationHobGuid2
with 0 value NumberOfProcessors field in the end of the
process to indicate
In the V2 patch set, modify some function protype and some variables naming.
Original message:
Create and consume gMpInformationHobGuid2 in UefiCpuPkg in this patch series.
Currently, there is a gMpInformationHobGuid defined, created and consumed only
in StandaloneMmPkg.
The HOB contains the
Comments inline:
On Wed, Dec 6, 2023 at 7:50 PM Sunil V L wrote:
> Hi Dhaval,
>
> Thank you very much for fixing the issue with instruction cache
> invalidation and confirming with the spec owner. Few minor comments
> below.
>
> On Mon, Dec 04, 2023 at 01:59:49PM +0530, Dhaval Sharma wrote:
>
On Fri, Nov 24, 2023 at 6:36 PM Neal Gompa wrote:
>
> On Thu, Nov 2, 2023 at 6:35 AM Laszlo Ersek wrote:
> >
> > On 10/31/23 23:27, Jeremy Linton wrote:
> > > On 10/31/23 12:37, Neal Gompa via groups.io wrote:
> > >> From: Neal Gompa
> > >>
> > >> Currently, the ReadyToBoot event is only
[Public]
Hi Maintainers,
Could you please review and merge this patch.
Thanks
AbduL
-Original Message-
From: Attar, AbdulLateef (Abdul Lateef)
Sent: Thursday, August 17, 2023 12:14 PM
To: Chang, Abner ; devel@edk2.groups.io
Cc: Sai Chaganty ; Isaac Oram
; Nate DeSimone ;
Reviewed-by: Gua Guo
-Original Message-
From: Liu, Zhiguang
Sent: Thursday, December 7, 2023 10:40 AM
To: devel@edk2.groups.io
Cc: Liu, Zhiguang ; Gao, Liming
; Wu, Jiaxin ; Ni, Ray
; Dong, Guo ; Rhodes, Sean
; Lu, James ; Guo, Gua
Subject: [PATCH 2/2]
No topics. Meeting canceled.
Mike
From: Kinney, Michael D
Sent: Tuesday, December 5, 2023 3:11 PM
To: devel@edk2.groups.io
Cc: Kinney, Michael D
Subject: TianoCore Community Meeting call for topics
Are there any topics for the TianoCore Community Meeting this week?
Thanks,
Mike
Add 5 level paging support when set the page table
memory range as RO to protect page table.
Cc: Liming Gao
Cc: Jiaxin Wu
Cc: Ray Ni
Cc: Guo Dong
Cc: Sean Rhodes
Cc: James Lu
Cc: Gua Guo
Signed-off-by: Zhiguang Liu
---
.../UefiPayloadEntry/Ia32/DxeLoadFunc.c | 2 +-
Add 5 level paging support when set the page table
memory range as RO to protect page table.
Cc: Liming Gao
Cc: Jiaxin Wu
Cc: Ray Ni
Cc: Guo Dong
Cc: Sean Rhodes
Cc: James Lu
Cc: Gua Guo
Signed-off-by: Zhiguang Liu
---
.../Core/DxeIplPeim/Ia32/DxeLoadFunc.c| 2 +-
[AMD Official Use Only - General]
Ah sorry, I missed that one.
Reviewed-by: Abner Chang
> -Original Message-
> From: Nickle Wang
> Sent: Thursday, December 7, 2023 7:46 AM
> To: Chang, Abner ; devel@edk2.groups.io
> Cc: Igor Kulchytskyy ; Nick Ramirez
> Subject: RE:
> -Original Message-
> From: Tan, Dun
> Sent: Thursday, December 7, 2023 8:23 AM
> To: Ni, Ray ; devel@edk2.groups.io
> Cc: Dong, Eric ; Kumar, Rahul R
> ; Gerd Hoffmann
> Subject: RE: [PATCH 3/6] UefiCpuPkg: Consume MpInfo2Hob in PiSmmCpuDxe
>
> Will change the code based on comments
>
> 2. We could break the while-loop when NumberOfProcessors equals to the
> value we retrieved from MpInfo2Hob. Right?
> This can speed up the code when there are lots of HOBs after the last
> SmmBaseHob instance.
>
> Dun: If the code flow break before finding all potential SmmBaseHob instance,
Updated in original message.
Thanks,
Dun
-Original Message-
From: Ni, Ray
Sent: Wednesday, December 6, 2023 6:15 PM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Dong, Eric ; Kumar, Rahul R ;
Gerd Hoffmann
Subject: RE: [PATCH 6/6] UefiCpuPkg: Avoid assuming only one smmbasehob
>
Will change the commit based on the comments
Thanks,
Dun
-Original Message-
From: Ni, Ray
Sent: Wednesday, December 6, 2023 6:02 PM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Dong, Eric ; Kumar, Rahul R ;
Gerd Hoffmann
Subject: RE: [PATCH 5/6] UefiCpuPkg: Cache core type in MpInfo2 HOB
Will change the code based on comments 1-9.
About comments 10, "10. The depex change means that CpuSmm driver could run
before CpuMp driver runs. Have you verified if CpuSmm can start well even
removing CpuMp DXE driver?"
Yes, I verified it in OvmfIa32X64 boot. CpuSmm can start well even
ResetSystem runtime call allows for sending reset data that
starts with a NULL terminated string. Add support to print
that string on console.
Signed-off-by: Ashish Singhal
---
.../Universal/ResetSystemRuntimeDxe/ResetSystem.c | 8
1 file changed, 8 insertions(+)
diff --git
Will change the commit based on the comments.
Thanks,
Dun
-Original Message-
From: Ni, Ray
Sent: Wednesday, December 6, 2023 5:24 PM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Dong, Eric ; Kumar, Rahul R ;
Gerd Hoffmann
Subject: RE: [PATCH 2/6] UefiCpuPkg: Build MpInfo2HOB in CpuMpPei
Thanks for the comments.
Will remove this field.
Thanks,
Dun
-Original Message-
From: Ni, Ray
Sent: Wednesday, December 6, 2023 5:09 PM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Dong, Eric ; Kumar, Rahul R ;
Gerd Hoffmann
Subject: RE: [PATCH 1/6] UefiCpuPkg: Create
Hi Abner,
> If we use PCD here, then we have to also update CreateEventEx in the
> RedfishFeatureCoreEntryPoint. Create the event using
> REDFISH_FEATURE_CORE_TPL.
Yes, I also modify RedfishFeatureCoreEntryPoint in below together.
> }
>
> /**
> @@ -670,7 +682,7 @@
Pushed as df2ec2a
-Original Message-
From: devel@edk2.groups.io On Behalf Of Nate DeSimone
Sent: Monday, December 4, 2023 10:48 AM
To: devel@edk2.groups.io
Cc: Ni, Ray ; Kinney, Michael D
Subject: [edk2-devel] [PATCH v2] PcAtChipsetPkg: Fix AcpiTimerLib
incompatibility with XhciDxe
Python 3.12 now produces syntax warnings when using an invalid escape
character (\ followed by an unexpected character). This happens
throughout BaseTools due the usage of regular expressions. the re module
in python suggests that when creating regex patterns, to use raw text.
This patch series
Switches regex patterns to raw text to resolve python 3.12 syntax
warnings in regards to invalid escape sequences, as is suggested by the
re (regex) module in python.
Cc: Rebecca Cran
Cc: Liming Gao
Cc: Bob Feng
Cc: Yuwei Chen
Signed-off-by: Joey Vagedes
---
But what we might do is invent a way to avoid setting the XP attribute
on the entire region based on some heuristic. Given that the main
purpose of the EFI memory attribute protocol is to provide the ability
to remove XP (and set RO instead), perhaps we can avoid the set
entirely? Just
My first caveat here is I am writing this email from the depths of a
parental leave, so my brain is only half here and I haven't been up to
date for the past two months :). I'll return in Jan and hopefully be
a bit more sensical.
On 12/6/2023 5:23 AM, Ard Biesheuvel wrote:
But what we might do
According to the discussion in "StandaloneMmPkg: Fix HOB space and
heap space conflicted issue" [1], Standalone MM modules should be HOB
consumers where HOB is read-only. Therefore, this patch removes the
supported functions for HOB creation in the StandaloneMmHobLib.
[1]
Reviewed-by: Thomas Abraham
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Merged
Mike
From: Kinney, Michael D
Sent: Wednesday, December 6, 2023 8:47 AM
To: Jake Garver ; Gao, Liming ;
devel@edk2.groups.io
Cc: Liu, Zhiguang ; Kinney, Michael D
Subject: RE: [PATCH v2] BaseStackCheckLib: Fix STACK FAULT message
Hi Jake,
PR opened with Rb tag added:
Thanks, Pedro and Ard,
An update on this issue:
* It seems to be very specific to Ubuntu20's 10.5 build of GCC.
* I could not reproduce it using a crosstool-ng build of 10.5, even after
trying to configure it identically to Ubuntu20's. It might be something in
Ubuntu's patchset, but
Hi Jake,
PR opened with Rb tag added: https://github.com/tianocore/edk2/pull/5113
Mike
From: Jake Garver
Sent: Wednesday, December 6, 2023 8:37 AM
To: Gao, Liming ; devel@edk2.groups.io
Cc: Kinney, Michael D ; Liu, Zhiguang
Subject: Re: [PATCH v2] BaseStackCheckLib: Fix STACK FAULT message
Any further comments on this change?
I'd like to get it merged.
Thanks,
Jake
From: Jake Garver
Sent: Wednesday, October 18, 2023 10:45 AM
To: gaoliming ; devel@edk2.groups.io
Cc: michael.d.kin...@intel.com ;
zhiguang@intel.com
Subject: Re: [PATCH v2]
*Reminder: TianoCore Community Meeting EMEA/NAMO*
*When:*
Thursday, December 7, 2023
8:00am to 9:00am
(UTC-08:00) America/Los Angeles
*Where:*
Microsoft Teams meeting Join on your computer or mobile app Click here to join
the meeting Meeting ID: 226 323 011 029 Passcode: hMRCj6 Download Teams |
Hi,
> But what we might do is invent a way to avoid setting the XP attribute
> on the entire region based on some heuristic. Given that the main
> purpose of the EFI memory attribute protocol is to provide the ability
> to remove XP (and set RO instead), perhaps we can avoid the set
> entirely?
From: Abner Chang
Remedy Redfish service discovery flow changes made
in commit 8736b8fd.
The above fix creates the dependency with SMBIOS 42h record,
which has a problem as SMBIOS 42h may not be created when
RedfishDiscovery.Supported() is invoked even all of the
required protocols are ready on
Hi Dhaval,
Few minor comments.
1) Please use RISC-V instead of RV every where.
On Mon, Dec 04, 2023 at 01:59:50PM +0530, Dhaval wrote:
> This PCD provides a way for platform to override any
> HW features that are default enabled by previous stages
> of FW (like OpenSBI). For the case where
Hi Dhaval,
Thank you very much for fixing the issue with instruction cache
invalidation and confirming with the spec owner. Few minor comments
below.
On Mon, Dec 04, 2023 at 01:59:49PM +0530, Dhaval Sharma wrote:
> Use newly defined cache management operations for RISC-V where possible
> It
*Reminder: TianoCore edk2-test Bug Triage Meeting*
*When:*
Thursday, December 7, 2023
10:00pm to 11:00pm
(UTC+08:00) Asia/Shanghai
*Where:*
https://armltd.zoom.us/j/94348061758?pwd=Q3RDeFA5K2JFaU5jdWUxc1FnaGdyUT09=addon
*Organizer:* Edhaya Chandran edhaya.chand...@arm.com (
For context:
https://openfw.io/edk2-devel/g2ulyam7plpgrqlganhb5u2wtswq26civqlt4gpnxmjgq65yt7@umm3dta22cdz/T/#t
On Wed, 6 Dec 2023 at 13:51, Gerd Hoffmann wrote:
>
> > > We can disable the protocol via this method but how would you set it
> > > to =n by default?
> >
> > if (Status !=
Hi Gerd,
On Tue, Dec 5, 2023 at 4:51 PM Gerd Hoffmann wrote:
>
> Extend the ValidateFvHeader function, additionally to the header checks
> walk over the list of variables and sanity check them.
>
> In case we find inconsistencies indicating variable store corruption
> return EFI_NOT_FOUND so the
> > We can disable the protocol via this method but how would you set it
> > to =n by default?
>
> if (Status != EFI_SUCCESS)
> // opt/org.tiabocode/MemAttrProtocol not present on the qemu cmdline
> MemAttrProtocol = ThisBuildsDefault
> }
FYI: Below is what I'll add to the fedora
[AMD Official Use Only - General]
Hi Nickle, one comment below.
> -Original Message-
> From: Nickle Wang
> Sent: Wednesday, December 6, 2023 4:57 PM
> To: devel@edk2.groups.io
> Cc: Chang, Abner ; Igor Kulchytskyy
> ; Nick Ramirez
> Subject: [edk2-redfish-client][PATCH]
>
Tested on N1SDP and Morello.
Tested-by: Himanshu Sharma
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Group Owner:
> +EFI_STATUS
> +GetSmBaseFromSmmBaseHob (
> + IN EFI_HOB_GUID_TYPE *FirstSmmBaseGuidHob,
> + IN UINTN MaxNumberOfCpus,
> + OUT UINTN **SmBaseBufferPointer
> + )
1. It's a bit strange that caller should locate the first GuidHob.
Can you update the existing code as
Add interrupt node to the AML description of the serial-port only if the
IRQ ID from the Configuration Manager is a valid SPI (shared processor
interrupt) or an extended SPI. So, for DBG2 UART ports where interrupt
is not mandatory, adding of an interrupt node in the AML description
using Serial
Taking reference from Table 2-1 of the Arm Generic Interrupt Controller
Architecture Specification, Issue H, January 2022, add macros for the
SPI and extended SPI ranges with the purpose of reusability on including
the ArmPkg.
Signed-off-by: Himanshu Sharma
---
Currently in the Dynamic Tables Framework, the interrupt node for the
AML description of the serial-ports is populated using the template
and so is mandatorily added even if the serial-port is enumerated as
a DBG2 port in the platform's configuration manager where the
interrupt is not mandatory.
There is the SmmCpuSyncLib Library class define the SMM CPU sync
flow, which is aligned with existing SMM CPU driver sync behavior.
This patch is to consume SmmCpuSyncLib instance directly.
With this change, SMM CPU Sync flow/logic can be customized
with different implementation no matter for any
> /**
>Create gMpInformationHobGuid2.
> **/
> @@ -558,13 +582,36 @@ BuildMpInformationHob (
>MP_INFORMATION2_HOB_DATA *MpInformation2HobData;
>MP_INFORMATION2_ENTRY *MpInformation2Entry;
>UINTN Index;
> + UINT8 *CoreType;
> + UINT32
This patch is to specify SmmCpuSyncLib instance for UefiPayloadPkg.
Cc: Laszlo Ersek
Cc: Guo Dong
Cc: Sean Rhodes
Cc: James Lu
Cc: Gua Guo
Cc: Ray Ni
Cc: Zeng Star
Signed-off-by: Jiaxin Wu
Reviewed-by: Gua Guo
---
UefiPayloadPkg/UefiPayloadPkg.dsc | 1 +
1 file changed, 1 insertion(+)
This patch is to specify SmmCpuSyncLib instance for OvmfPkg.
Cc: Laszlo Ersek
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc: Eric Dong
Cc: Ray Ni
Cc: Zeng Star
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Signed-off-by: Jiaxin Wu
---
OvmfPkg/CloudHv/CloudHvX64.dsc | 2 ++
Implements SmmCpuSyncLib Library instance. The instance refers the
existing SMM CPU driver (PiSmmCpuDxeSmm) sync implementation
and behavior:
1.Abstract Counter and Run semaphores into SmmCpuSyncCtx.
2.Abstract CPU arrival count operation to
SmmCpuSyncGetArrivedCpuCount(), SmmCpuSyncCheckInCpu(),
This patch is to define 3 new functions (WaitForBsp & ReleaseBsp &
ReleaseOneAp) used for the semaphore sync between BSP & AP. With the
change, BSP and AP Sync flow will be easy understand as below:
BSP: ReleaseAllAPs or ReleaseOneAp --> AP: WaitForBsp
BSP: WaitForAllAPs <-- AP:
Intel is planning to provide different SMM CPU Sync implementation
along with some specific registers to improve the SMI performance,
hence need SmmCpuSyncLib Library for Intel.
This patch is to:
1.Adds SmmCpuSyncLib Library class in UefiCpuPkg.dec.
2.Adds SmmCpuSyncLib.h function declaration
The series patches are to refine SMM CPU Sync flow.
After the refinement, SmmCpuSyncLib is abstracted for
any user to provide different SMM CPU Sync implementation.
Compared to V2, has following refinement & changes:
1. rename SMM_CPU_SYNC_CXT to SMM_CPU_SYNC_CONTEXT
2. rename SemBlock to
Reviewed-by: Ray Ni
Thanks,
Ray
> -Original Message-
> From: Tan, Dun
> Sent: Tuesday, December 5, 2023 1:49 PM
> To: devel@edk2.groups.io
> Cc: Dong, Eric ; Ni, Ray ; Kumar,
> Rahul R ; Gerd Hoffmann
> Subject: [PATCH 4/6] UefiCpuPkg: Add a new field in MpInfo2 HOB
>
> Add new field
1. The function name can be "GetMpInformation()" without mentioning
"FromMpInfo2Hob".
> + EFI_HOB_GUID_TYPE *GuidHob;
> + EFI_HOB_GUID_TYPE *FirstMpInfor2Hob;
2. "FirstMpInfo2Hob". Please remove "r".
>+ FirstMpInfor2Hob = GetFirstGuidHob ();
3. Please update comments to
Hello Ray and the MdePkg maintainers,
Does this patch looks fine ? When/if this patch is accepted,
I will send the other patches relying on this present patch,
cf. https://edk2.groups.io/g/devel/message/111900
Regards,
Pierre
On 12/1/23 13:26, Pierre Gondois wrote:
Hi Ray,
I followed the way
Hi Mike and Liming,
Could you please help to review this patch?
Thanks,
Dun
-Original Message-
From: devel@edk2.groups.io On Behalf Of duntan
Sent: Thursday, November 9, 2023 10:50 AM
To: devel@edk2.groups.io
Cc: Kinney, Michael D ; Gao, Liming
; Liu, Zhiguang ; Ni, Ray
Subject:
Hi Mike and Liming,
Could you please help to review this patch?
Thanks.
Dun
-Original Message-
From: devel@edk2.groups.io On Behalf Of duntan
Sent: Thursday, November 9, 2023 10:50 AM
To: devel@edk2.groups.io
Cc: Kinney, Michael D ; Gao, Liming
; Liu, Zhiguang ; Ni, Ray
Subject:
4 minor comments:
> +DEBUG ((DEBUG_INFO, "BuildMpInformationHob\n"));
1. DEBUG ("Creating MpInformation2 HOB...\n")
> +
> +for (Index = 0; Index < NumberOfProcessorsInHob; Index++) {
> + MpInformation2Entry = GET_MP_INFORMATION_ENTRY
> (MpInformation2HobData, Index);
2. Since
> + MP information protocol only provides static information of MP processor.
> +
> + If SwitchBSP or Enable/DisableAP in MP service is called between the HOB
> + production and HOB consumption,
> EFI_PROCESSOR_INFORMATION.StatusFlag and
> + NumberOfEnabledProcessors fields in this HOB may be
RedfishFeatureDriverStartup is callback function at TPL_CALLBACK
level. In this function, Redfish events are signaled. However,
Redfish events are created in TPL_CALLBACK level too. As the result,
Redfish events cannot be invoked in desired sequence. Decrease the
TPL to TPL_APPLICATION level
OS may enable CET-IBT feature by set MSR IA32_U_CET.bit2.
If IA32_U_CET.bit2 is set, CPU is in WAIT_FOR_ENDBRANCH state and
the next assemble code is not ENDBR, it will trigger #CP exception
when set CR4.CET bit.
SMI handler needs to backup MSR IA32_U_CET and clear MSR IA32_U_CET
before set
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 10 +++---
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 10 +++---
2 files changed, 14 insertions(+), 6 deletions(-)
diff --git
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Cet.inc | 26 ++
1 file changed, 26 insertions(+)
create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Cet.inc
diff --git
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 14 +-
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 15 +--
2 files changed, 2 insertions(+), 27 deletions(-)
diff --git
Signed-off-by: Sheng Wei
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Cc: Wu Jiaxin
Cc: Tan Dun
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm | 5 +++--
UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm | 5 +++--
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git
Patch V7:
Remove all the change in MdePkg.
Move cet.inc to UefiCpuPkg\PiSmmCpuDxeSmm,
beacuse CET feature is only used in SMM.
Patch V6:
Cet.inc only contains definitions for x86 CPU.
Move the file to \Ia32 and \X64 folder.
Refine code for cet.inc.
Patch V5:
File cet.inc will be
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