Add maintainers to help review the patch,
thank you,
Ma Hua
On 1/5/2024 1:38 PM, Ma, Hua wrote:
Add macro to enable selection of timer
- HPET: UEFI Payload will use HPET timer
- LAPIC: UEFI Payload will use local APIC timer
Signed-off-by: Hua Ma
---
UefiPayloadPkg/UefiPayloadPkg.dsc | 16
Add macro to enable selection of timer
- HPET: UEFI Payload will use HPET timer
- LAPIC: UEFI Payload will use local APIC timer
Signed-off-by: Hua Ma
---
UefiPayloadPkg/UefiPayloadPkg.dsc | 16
UefiPayloadPkg/UefiPayloadPkg.fdf | 4
2 files changed, 20 insertions(+)
The generic watchdog offset register is 48 bits wide, and can be set by
performing two 32-bit writes.
Add support for writing the high 16 bits of the offset register and
update the signature of the WatchdogWriteOffsetRegister function to take
a UINT64 value.
Signed-off-by: Rebecca Cran
---
The calculation of the timer period was broken. Introduce a global
mTimerPeriod so the calculation can be removed. Since mTimerFrequencyHz
is only used in one place, remove the global and make it a local
variable. Do the same with mNumTimerTicks.
Signed-off-by: Rebecca Cran
---
Fixes and improvements to GenericWatchdogDxe.
PR: https://github.com/tianocore/edk2/pull/5176
Rebecca Cran (3):
ArmPkg: Update GenericWatchdogDxe to allow setting full 48-bit offset
ArmPkg: Introduce global mTimerPeriod and remove calculation
ArmPkg: Disable watchdog interaction after
Update GenericWatchdogDxe to disable watchdog interaction after exiting
boot services. Also, move the mEfiExitBootServicesEvent event to the top
of the file with the other static variables.
Signed-off-by: Rebecca Cran
---
ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c | 14
Thanks, I've incorporated the changes into the v2 patch series.
--
Rebecca
On 1/3/2024 3:56 PM, Ard Biesheuvel wrote:
Hi Rebecca,
On Wed, 3 Jan 2024 at 21:44, Rebecca Cran
wrote:
Fix the calculation of the timer period in GenericWatchdogDxe: we need
to multiply before dividing to keep the
Thanks, I've incorporated the changes into the v2 patch series.
--
Rebecca
On 1/4/2024 3:01 AM, Sami Mujawar wrote:
Hi Rebecca,
Thank you for this patch.
I have some minor suggestions marked inline as [SAMI].
Regards,
Sami Mujawar
On 03/01/2024, 20:44, "Rebecca Cran"
The calculation of the timer period was broken. Introduce a global
mTimerPeriod so the calculation can be removed. Since mTimerFrequencyHz
is only used in one place, remove the global and make it a local
variable. Do the same with mNumTimerTicks.
Signed-off-by: Rebecca Cran
---
Update GenericWatchdogDxe to disable watchdog interaction after exiting
boot services. Also, move the mEfiExitBootServicesEvent event to the top
of the file with the other static variables.
Signed-off-by: Rebecca Cran
---
ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c | 14
Fixes and improvements to GenericWatchdogDxe.
PR: https://github.com/tianocore/edk2/pull/5176
Rebecca Cran (3):
ArmPkg: Update GenericWatchdogDxe to allow setting full 48-bit offset
ArmPkg: Introduce global mTimerPeriod and remove calculation
ArmPkg: Disable watchdog interaction after
The generic watchdog offset register is 48 bits wide, and can be set by
performing two 32-bit writes.
Add support for writing the high 16 bits of the offset register and
update the signature of the WatchdogWriteOffsetRegister function to take
a UINT64 value.
Signed-off-by: Rebecca Cran
---
PatchSmmSaveStateMap patches the SMM entry (code) and SmmSaveState
region (data) for each core, which can be improved to flush TLB once
after all the memory entries have been patched.
FlushTlbForAll flushes TLB for each core in serial, which can be
improved to flush TLB in parrallel.
v2:
Add
Thanks for the comments, Ray.
It is a mistake to remove the FlushTlb() in this patch. I will send out the
patch v2.
BRs
Zhi Jin
-Original Message-
From: Ni, Ray
Sent: Friday, January 05, 2024 10:21 AM
To: devel@edk2.groups.io; Jin, Zhi
Cc: Laszlo Ersek ; Kumar, Rahul R ;
Gerd
Zhi,
With your patch,
1. SMM entry(code) and SmmSaveState region (data) are changed to correct paging
attributes.
2. FlushTlb() is removed after the changing.
3. FlushTlb() is updated to flush in parallel.
My concern is about #2. Can you explain a bit why FlushTlb() can be removed
after
PatchSmmSaveStateMap patches the SMM entry (code) and SmmSaveState
region (data) for each core, which can be improved to flush TLB once
after all the memory entries have been patched.
FlushTlbForAll flushes TLB for each core in serial, which can be
improved to flush TLB in parrallel.
Cc: Ray Ni
[Public]
Hi Ard,
Would you like to merge this change to edk2-platforms master by yourself?
Thanks
Abner
> -Original Message-
> From: Attar, AbdulLateef (Abdul Lateef)
> Sent: Thursday, January 4, 2024 10:17 PM
> To: Ard Biesheuvel ; devel@edk2.groups.io
> Cc: Ard Biesheuvel ; Leif
[Public]
Acked-by: Abner Chang
> -Original Message-
> From: Attar, AbdulLateef (Abdul Lateef)
> Sent: Thursday, January 4, 2024 10:17 PM
> To: Ard Biesheuvel ; devel@edk2.groups.io
> Cc: Ard Biesheuvel ; Leif Lindholm
> ; Chang, Abner
> Subject: RE: [PATCH edk2-platforms] Platform,
Looks good to me.
But could it be possible to rephrase "ETAG is not supported on Redfish
service." ?
May be I misunderstand, but I assume "Redfish service" is a service at
BMC side, while we are disabling ETAG functionality at Redfish client
side.
README.md says "Redfish service hosted by Board
I noticed recent commits by Jeff Brasen, Jake Garver, Joey Vagades and
Michael Roth have funky Author lines, which I think means .mailmap needs
updated?
commit 7a5823f85be99b9a92751fcf4141f7982fa5cc80
Author: Jeff Brasen via groups.io
Date: Thu Dec 28 12:47:08 2023 -0800
EmbeddedPkg:
Makes sense. Should we also set IfrNvData->DhcpEnable = TRUE when updating the
Policy then?
From: Ashish Singhal
Sent: Wednesday, January 3, 2024 8:52 AM
To: Kasbekar, Saloni ; devel@edk2.groups.io;
Clark-williams, Zachary ; Jeff Brasen
Subject: Re: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To
Wouldn't it be better to add the Stack Protector library
(MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf) instead of
disabling it?
--
Rebecca Cran
On 1/4/2024 11:49 AM, Prabin CA via groups.io wrote:
Add the no-stack-protector compiler flag to allow StandaloneMM builds
on both
From: Pranav Madhu
The Neoverse RD-V2 FVP platform includes 16 CPUs and each CPU has 64KB
of L1 instruction/data cache, 2MB of L2 cache and 32MB of system level
cache. Extend the SMBIOS support for RD-V2 platform with this
configuration and reuse rest of the RD-N2 SMBIOS configuration for the
The Neoverse RD-N2-Cfg3 platform is a variant of RD-N2 platform with a
different mesh size and GIC ITS count. As part of the initial platform
support, add the corresponding platform and flash description files.
Use PcdPlatformVariant for the RD-N2-Cfg3 platform to specify the
platform variant.
From: Pranav Madhu
Add RD-V2 platform identification values including the part number
and configuration number. This information will be used in populating
the SMBIOS tables.
Signed-off-by: Pranav Madhu
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 7
A new PCD named PcdPlatformVariant is introduced to specify the variant
number of a platform. This PCD can be used to select platform variant
specific configurations. The default value of this PCD is 0 which
selects the base variant.
Signed-off-by: Prabin CA
---
From: Pranav Madhu
The Neoverse RD-V2 FVP platform includes 16 CPUs and each CPU has 64KB
of L1 instruction/data cache, 2MB of L2 cache and 32MB of system level
cache. Extend the SMBIOS support for RD-V2 platform with this
configuration and reuse rest of the RD-N2 SMBIOS configuration for the
The Neoverse RD-N2-Cfg3 platform is a variant of RD-N2 platform with a
different mesh size and GIC ITS count. As part of the initial platform
support, add the corresponding platform and flash description files.
Use PcdPlatformVariant for the RD-N2-Cfg3 platform to specify the
platform variant.
A new PCD named PcdPlatformVariant is introduced to specify the variant
number of a platform. This PCD can be used to select platform variant
specific configurations. The default value of this PCD is 0 which
selects the base variant.
Signed-off-by: Prabin CA
---
From: Pranav Madhu
Add RD-V2 platform identification values including the part number
and configuration number. This information will be used in populating
the SMBIOS tables.
Signed-off-by: Pranav Madhu
Signed-off-by: Prabin CA
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 7
From: Vijayenthiran Subramaniam
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3479
A recent change in MdeModulePkg [1] introduced VariableFlashInfoLib as a
dependency to support dynamic variable flash information. Add an
instance for the library class VariableFlashInfoLib in
Add the no-stack-protector compiler flag to allow StandaloneMM builds
on both AArch64 and x86 host. Without this flag, the link stage fails
with the following errors on multiple files when built with gcc
(Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0:
undefined reference to `__stack_chk_guard'
undefined
From: Omkar Anand Kulkarni
The software executing at a higher privileged level on the reference
design platforms have been updated to allow software executing at EL1
and EL0 to access the Advanced SIMD and floating-point registers (FPEN
field of CPACR_EL1 system register is programmed to allow
This patch series introduces support for two reference design platforms-
RD-N2-Cfg3 and RD-V2. The RD-N2-Cfg3 FVP platform is a variant of RD-N2
platform with a different mesh size and GIC ITS count. It is based on
the Neoverse N2 CPUs and includes 16xMP1 CPUs. RD-N2-Cfg3 has 12 GIC ITS
blocks, 6
Hi Himanshu,
There are some minor comments marked inline as [SAMI], otherwise this
patch looks good to me.
I can fix those up before merging the patch.
With that,
Reviewed-by: Sami Mujawar
Regards,
Sami Mujawar
On 04/01/2024 08:02 am, Himanshu Sharma wrote:
Add interrupt node to the
Hi Himanshu,
Thank you for this patch.
These changes look good to me.
Reviewed-by: Sami Mujawar
Regards,
Sami Mujawar
On 04/01/2024 08:02 am, Himanshu Sharma wrote:
Taking reference from Table 2-1 of the Arm Generic Interrupt Controller
Architecture Specification, Issue H, January 2022,
On Thu, Jan 04, 2024 at 03:38:17PM +0100, Laszlo Ersek wrote:
> On 1/3/24 14:58, Sunil V L wrote:
> > Sstc extension allows to program the timer and receive the interrupt
> > without using an SBI call. This reduces the latency to generate the timer
> > interrupt. So, detect whether Sstc extension
From: "Pethaiyan, Madhan"
Mantis 1899 : Added missing condition check under GetImageInfo function,
if the PackageVersionName is NULL return EFI_INVALID_PARAMETER
Signed-off-by: Pethaiyan Madhan
Cc: Liming Gao
Cc: Michael D Kinney
Cc: Wei6 Xu
---
FmpDevicePkg/FmpDxe/FmpDxe.c | 2 +-
1 file
Hi,
> >> - if the StartId is 0x55aa, then we need to look further, beause we
> >> can't decide yet. For example, if State is VAR_HEADER_VALID_ONLY (0x7f),
> >> then it might be fine for the variable header (at the very end of the
> >> varstore) *not* to be followed by payload bytes (name,
Hi Laszlo,
Thank you very much for the review!.
On Thu, Jan 04, 2024 at 03:38:17PM +0100, Laszlo Ersek wrote:
> On 1/3/24 14:58, Sunil V L wrote:
> > Sstc extension allows to program the timer and receive the interrupt
> > without using an SBI call. This reduces the latency to generate the timer
Hi Abner,
Some small correction in comments syntax (see below).
Thank you,
Igor
-Original Message-
From: abner.ch...@amd.com
Sent: Thursday, January 4, 2024 4:09 AM
To: devel@edk2.groups.io
Cc: Nickle Wang ; Igor Kulchytskyy ; Mike
Maslenkin
Subject: [EXTERNAL]
On 1/4/24 08:32, duntan wrote:
> Retrive EXTENDED_PROCESSOR_INFORMATION in the API
> MpInitLibGetProcessorInfo() of MpInitLibUp instance
> when the BIT24 of input ProcessorNumber is set.
> It's to align with the behavior in PEI/DXE MpInitLib
>
> Signed-off-by: Dun Tan
> Cc: Ray Ni
> Cc: Laszlo
On 1/4/24 08:32, duntan wrote:
> Check lower 24 bits of ProcessorNumber instead of
> the value of ProcessorNumber in the API
> MpInitLibGetProcessorInfo() of MpInitLibUp instance.
> Lower 24 bits of ProcessorNumber contains the actual
> processor number.
> The BIT24 of input ProcessorNumber might
On 1/3/24 14:58, Sunil V L wrote:
> Override Sstc extension and use SBI calls itself by default for RISC-V
> qemu virt platform.
>
> Cc: Andrei Warkentin
> Cc: Ard Biesheuvel
> Cc: Gerd Hoffmann
> Cc: Jiewen Yao
> Cc: Laszlo Ersek
> Signed-off-by: Sunil V L
> ---
>
On 1/3/24 14:58, Sunil V L wrote:
> Sstc extension allows to program the timer and receive the interrupt
> without using an SBI call. This reduces the latency to generate the timer
> interrupt. So, detect whether Sstc extension is supported and use the
> stimecmp register directly to program the
On 1/3/24 14:58, Sunil V L wrote:
> Override Sstc extension and use SBI calls itself by default for RISC-V
> qemu virt platform.
>
> Cc: Andrei Warkentin
> Cc: Ard Biesheuvel
> Cc: Gerd Hoffmann
> Cc: Jiewen Yao
> Cc: Laszlo Ersek
> Signed-off-by: Sunil V L
> ---
>
[Public]
Acked-by: Abdul Lateef Attar
-Original Message-
From: Ard Biesheuvel
Sent: Wednesday, December 20, 2023 3:54 AM
To: devel@edk2.groups.io
Cc: Ard Biesheuvel ; Leif Lindholm
; Chang, Abner ; Attar,
AbdulLateef (Abdul Lateef)
Subject: [PATCH edk2-platforms] Platform, Silicon:
Hi Abdul,
Thank you for this patch.
Reviewed-by: Sami Mujawar
Regards,
Sami Mujawar
On 04/01/2024, 13:43, "Abdul Lateef Attar" mailto:abdat...@amd.com>> wrote:
From: Abdul Lateef Attar mailto:abdullateef.at...@amd.com>>
Update the "Basic Status" matrix for DynamicTablesPkg by
adding a
Reviewed-by: Igor Kulchytskyy
Regards,
Igor Kulchytskyy
-Original Message-
From: abner.ch...@amd.com
Sent: Thursday, January 4, 2024 4:12 AM
To: devel@edk2.groups.io
Cc: Nickle Wang ; Igor Kulchytskyy
Subject: [EXTERNAL] [edk2-redfish-client][PATCH V2]
RedfishClientPkg/libredfish:
*TianoCore edk2-test Bug Triage Meeting*
*When:*
Thursday, January 4, 2024
10:00pm to 11:00pm
(UTC+08:00) Asia/Shanghai
*Where:*
https://armltd.zoom.us/j/94348061758?pwd=Q3RDeFA5K2JFaU5jdWUxc1FnaGdyUT09=addon
*Organizer:* Edhaya Chandran edhaya.chand...@arm.com (
*Reminder: TianoCore edk2-test Bug Triage Meeting*
*When:*
Thursday, January 4, 2024
10:00pm to 11:00pm
(UTC+08:00) Asia/Shanghai
*Where:*
https://armltd.zoom.us/j/94348061758?pwd=Q3RDeFA5K2JFaU5jdWUxc1FnaGdyUT09=addon
*Organizer:* Edhaya Chandran edhaya.chand...@arm.com (
From: Abdul Lateef Attar
Update the "Basic Status" matrix for DynamicTablesPkg by
adding a check mark for Windows VS2019 IA32/X64 support.
Cc: Sean Brogan
Cc: Joey Vagedes
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Pierre Gondois
Cc: Sami Mujawar
Signed-off-by: Abdul Lateef Attar
---
On 1/3/24 16:11, Gerd Hoffmann wrote:
> Hi,
>
>> Second (and worse): the bug. In "OvmfPkg/RiscVVirt/VarStore.fdf.inc", it
>> turns out that we *still* generate the gEfiVariableGuid varstore header
>> signature, in case SECURE_BOOT_ENABLE is FALSE. For some reason, commit
>> 92b27c2e6ada
N1SdpNtFwConfigPei PEIM extracts platform information from NT_FW_CONFIG
and provides it to other modules as a PPI and a HOB. PlatformLibMem
then consumes these values in the form of a PPI during PEI phase and
ConfigurationManagerDxe as a HOB during DXE phase. The previous
approach of fetching
Incorporate N1SdpNtFwConfigPei PEI module which parses NT_FW_CONFIG and
passes it to other PEI modules(as PPI) and DXE modules(as HOB).
Signed-off-by: sahil
---
Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 3 +++
Platform/ARM/N1Sdp/N1SdpPlatform.dsc| 5 -
NT_FW_CONFIG DTB contains platform information passed by Tf-A boot stage.
This information is used for Virtual memory map generation during PEI phase
and passed on to DXE phase as a HOB, where it is used in
ConfigurationManagerDxe.
This patch adds a PEI to parse NT_FW_CONFIG and pass it to other
This patch adds a PEI to parse NT_FW_CONFIG and pass it to
other PEI modules(as PPI) and DXE modules(as HOB).
Signed-off-by: sahil
---
Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf | 41 ++
Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c | 132
NT_FW_CONFIG DTB contains platform information passed by TF-A boot
stage. This patch enables support to first extract address of
NT_FW_CONFIG and then pass it to other modules as a PPI.
Signed-off-by: sahil
---
Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec| 5 -
Reviewed-by: Nickle Wang mailto:nick...@nvidia.com>>
Regards,
Nickle
From: Mike Maslenkin
Sent: Thursday, January 4, 2024 7:56 PM
To: devel@edk2.groups.io
Cc: Mike Maslenkin ; Abner Chang
; Nickle Wang ; Igor Kulchytskyy
Subject: [PATCH]
Variable 'Status' may be used uninitialized in this function
[-Werror=maybe-uninitialized]
Signed-off-by: Mike Maslenkin
Cc: Abner Chang
Cc: Nickle Wang
Cc: Igor Kulchytskyy
---
RedfishClientPkg/RedfishFeatureCoreDxe/RedfishFeatureCoreDxe.c | 1 +
1 file changed, 1 insertion(+)
diff --git
Hi Abdul,
Thanks for confirming.
I think the matrix at https://github.com/tianocore/edk2/tree/master/.pytool
needs updating.
Can you send a patch to update that, please?
Regards,
Sami Mujawar
On 04/01/2024, 04:05, "Attar, AbdulLateef (Abdul Lateef)"
mailto:abdullateef.at...@amd.com>>
Hi Rebecca,
Thank you for this patch.
I have some minor suggestions marked inline as [SAMI].
Regards,
Sami Mujawar
On 03/01/2024, 20:44, "Rebecca Cran" mailto:rebe...@os.amperecomputing.com>> wrote:
Update GenericWatchdogDxe to disable watchdog interaction after exiting
boot services.
Hi Rebecca,
Thank you for this patch.
I have some minor suggestions marked inline as [SAMI].
Regards,
Sami Mujawar
On 03/01/2024, 20:44, "Rebecca Cran" mailto:rebe...@os.amperecomputing.com>> wrote:
The generic watchdog offset register is 48 bits wide, and can be set by
performing two
From: Abner Chang
Fix uninitialized variable build error
Signed-off-by: Abner Chang
Cc: Nickle Wang
Cc: Igor Kulchytskyy
---
.../PrivateLibrary/RedfishLib/edk2libredfish/src/service.c| 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
From: Abner Chang
Add PCD to disable ETag capability for the case Redfish
service doesn't support ETag.
Signed-off-by: Abner Chang
Cc: Nickle Wang
Cc: Igor Kulchytskyy
Cc: Mike Maslenkin
---
RedfishClientPkg/RedfishClientPkg.dec | 3 +
.../RedfishFeatureUtilityLib.inf
From: Abner Chang
Fix uninitialized variable build error
Signed-off-by: Abner Chang
Cc: Nickle Wang
Cc: Igor Kulchytskyy
---
.../PrivateLibrary/RedfishLib/edk2libredfish/src/service.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Hi,
> disabling it can reduce code size in some embedded targets.
Could you provide size change after/before this define enabled?
Thanks,
Yi
-Original Message-
From: Hou, Wenxing
Sent: Thursday, January 4, 2024 4:34 PM
To: devel@edk2.groups.io
Cc: Yao, Jiewen ; Li, Yi1 ; Jiang,
Guomin
From: Abner Chang
Add PCD to disable ETag capability for the case Redfish
service doesn't support ETag.
Signed-off-by: Abner Chang
Cc: Nickle Wang
Cc: Igor Kulchytskyy
Cc: Mike Maslenkin
---
RedfishClientPkg/RedfishClientPkg.dec | 2 +
.../RedfishFeatureUtilityLib.inf
Looks good to me.
Reviewed-by: Yi Li
-Original Message-
From: Hou, Wenxing
Sent: Thursday, January 4, 2024 4:20 PM
To: devel@edk2.groups.io
Cc: Yao, Jiewen ; Li, Yi1 ; Jiang,
Guomin
Subject: [PATCH 1/1] CryptoPkg: move define to CrtLibSupport
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4630
Enable MBEDTLS_NO_UDBL_DIVISION to fix GCC x64 build failure.
Cc: Jiewen Yao
Cc: Yi Li
Cc: Guomin Jiang
Signed-off-by: Wenxing Hou
Wenxing Hou (1):
CryptoPkg: fix gcc build fail for CryptoPkgMbedtls
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4630
Enable MBEDTLS_NO_UDBL_DIVISION to fix GCC x64 build failure.
Cc: Jiewen Yao
Cc: Yi Li
Cc: Guomin Jiang
Signed-off-by: Wenxing Hou
---
CryptoPkg/Library/MbedTlsLib/Include/mbedtls/mbedtls_config.h | 2 +-
1 file changed, 1
Thanks for the clarification.
On Thu, 4 Jan 2024 at 03:21, Tan, Dun wrote:
>
> Hi Ard,
>
> This patch set has been dropped. Another patch set "Create and consume a new
> gMpInformationHobGuid2 in UefiCpuPkg." is adopted.
> When the Maximum length 64KB is not enough, there might be more than 1
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4632
The before code will cause redefine error.
This patch move them to CrtLibSupport header.
But Openssl has already defined them internally,
need to increase support for OPENSLL_SYS_UEFI judgment.
Cc: Jiewen Yao
Cc: Yi Li
Cc: Guomin Jiang
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4632
The before code will cause redefine error.
This patch move them to CrtLibSupport header.
But Openssl has already defined them internally,
need to increase support for OPENSLL_SYS_UEFI judgment.
Cc: Jiewen Yao
Cc: Yi Li
Cc: Guomin Jiang
[AMD Official Use Only - General]
Reviewed-by: Abner Chang
> -Original Message-
> From: Nickle Wang
> Sent: Thursday, January 4, 2024 1:10 PM
> To: devel@edk2.groups.io
> Cc: Chang, Abner ; Igor Kulchytskyy
> ; Nick Ramirez
> Subject: [edk2-redfish-client][PATCH 4/4]
[AMD Official Use Only - General]
Reviewed-by: Abner Chang
> -Original Message-
> From: Nickle Wang
> Sent: Thursday, January 4, 2024 1:10 PM
> To: devel@edk2.groups.io
> Cc: Chang, Abner ; Igor Kulchytskyy
> ; Nick Ramirez
> Subject: [edk2-redfish-client][PATCH 3/4]
[AMD Official Use Only - General]
Reviewed-by: Abner Chang
> -Original Message-
> From: Nickle Wang
> Sent: Thursday, January 4, 2024 1:09 PM
> To: devel@edk2.groups.io
> Cc: Chang, Abner ; Igor Kulchytskyy
> ; Nick Ramirez
> Subject: [edk2-redfish-client][PATCH 2/4]
[AMD Official Use Only - General]
Reviewed-by: Abner Chang
> -Original Message-
> From: Nickle Wang
> Sent: Thursday, January 4, 2024 1:09 PM
> To: devel@edk2.groups.io
> Cc: Chang, Abner ; Igor Kulchytskyy
> ; Nick Ramirez
> Subject: [edk2-redfish-client][PATCH 1/4] RedfishClientPkg:
Add interrupt node to the AML description of the serial-port only if the
IRQ ID from the Configuration Manager is a valid SPI (shared processor
interrupt) or an extended SPI. So, for DBG2 UART ports where interrupt
is not mandatory, adding of an interrupt node in the AML description
using Serial
Taking reference from Table 2-1 of the Arm Generic Interrupt Controller
Architecture Specification, Issue H, January 2022, add macros for the
SPI and extended SPI ranges with the purpose of reusability on including
the ArmPkg.
Signed-off-by: Himanshu Sharma
---
Currently in the Dynamic Tables Framework, the interrupt node for the
AML description of the serial-ports is populated using the template
and so is mandatorily added even if the serial-port is enumerated as
a DBG2 port in the platform's configuration manager where the
interrupt is not mandatory.
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