I have incorporated all the review comments and suggestions
on v2 patches.
1) Was able to successfully run the CI on edk2-platforms enabled by Pierre
https://github.com/PierreARM/edk2-platforms/tree/review/N1Sdp_v2
2) Observed three false positive for Dependency Check
N1Sdp/ConfigurationManage
This patch adds missing documentation for few of the functions
and fixes few formatting changes.
Signed-off-by: Khasim Syed Mohammed
---
.../Library/PlatformLib/PlatformLib.c | 46 +--
1 file changed, 41 insertions(+), 5 deletions(-)
diff --git a/Silicon/ARM/NeoverseN1So
This patch introduces new PCDs required to enable
chip to chip interface and corresponding memory map is updated.
Signed-off-by: Chandni Cherukuri
Signed-off-by: Khasim Syed Mohammed
---
.../Library/PlatformLib/PlatformLib.inf | 28 +--
.../Library/PlatformLib/PlatformLibMem.c |
This patch adds missing documentation for few of the functions
and fixes few formatting changes.
Signed-off-by: Khasim Syed Mohammed
---
.../Library/PlatformLib/PlatformLib.c | 46 +--
1 file changed, 41 insertions(+), 5 deletions(-)
diff --git a/Silicon/ARM/NeoverseN1So
This patch introduces new PCDs required to enable
chip to chip interface and corresponding memory map is updated.
Signed-off-by: Chandni Cherukuri
Signed-off-by: Khasim Syed Mohammed
---
.../Library/PlatformLib/PlatformLib.inf | 28 +--
.../Library/PlatformLib/PlatformLibMem.c |
Add an initial platform DXE driver and support for ramdisk devices.
Signed-off-by: Deepak Pandey
Signed-off-by: Khasim Syed Mohammed
---
.../N1Sdp/Drivers/PlatformDxe/PlatformDxe.c | 59 +++
.../N1Sdp/Drivers/PlatformDxe/PlatformDxe.inf | 47 +++
2 files changed, 1
This patch adds PCDs and updates the fdf file for N1Sdp
platform specific configurations.
Signed-off-by: Deepak Pandey
Signed-off-by: Khasim Syed Mohammed
---
Platform/ARM/N1Sdp/N1SdpPlatform.dec | 98
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 37 ++-
Platform/
This patch creates Dsdt.asl, SsdtPci.asl and SsdtRemotePci.asl files
to provide the platform specific APCI table entries.
Three PCI root ports are available on N1Sdp, PCI0 is the default root port
PCI1 is the CCIX root port and PCI2 is the Remote host root port.
The Remote host specific entries a
The dynamic tables framework utilizes the configuration manager
protocol to get the platform specific information required for
building the firmware tables.
The configuration manager is a platform specific component that
collates the platform hardware information and builds an abstract
platform co
This patch enables ACPI tables and configuration manager for N1SDP
Signed-off-by: Sami Mujawar
Signed-off-by: Khasim Syed Mohammed
---
Platform/ARM/N1Sdp/Include/N1SdpAcpiHeader.h | 35
Platform/ARM/N1Sdp/N1SdpPlatform.dec | 1 +
Platform/ARM/N1Sdp/N1SdpPlatform.ds
On Tue, Oct 19, 2021 at 01:14 AM, PierreGondois wrote:
>
> Hi Khasim,
>
> 2 minor comments:
>
> On 10/10/21 19:29, Khasim Mohammed via groups.io wrote:
>
>> This patch creates Dsdt.asl, SsdtPci.asl and SsdtRemotePci.asl files
>> to provide the pla
Hi Sami,
On Fri, Nov 5, 2021 at 06:05 AM, Sami Mujawar wrote:
>
> Hi Khasim,
>
> Please find my response inline marked [SAMI].
>
> Regards,
>
> Sami Mujawar
>
> On 26/10/2021 06:39 PM, Khasim Mohammed via groups.io wrote:
>
>> This patch adds
This patch adds missing documentation for few of the functions
and fixes few formatting changes.
Signed-off-by: Khasim Syed Mohammed
---
.../Library/PlatformLib/PlatformLib.c | 46 +--
1 file changed, 41 insertions(+), 5 deletions(-)
diff --git a/Silicon/ARM/NeoverseN1So
Add an initial platform DXE driver and support for ramdisk devices.
Signed-off-by: Deepak Pandey
Signed-off-by: Khasim Syed Mohammed
---
.../N1Sdp/Drivers/PlatformDxe/PlatformDxe.c | 59 +++
.../N1Sdp/Drivers/PlatformDxe/PlatformDxe.inf | 47 +++
2 files changed, 1
This patch adds PCDs and updates the fdf file for N1Sdp
platform specific configurations.
Signed-off-by: Deepak Pandey
Signed-off-by: Khasim Syed Mohammed
---
Platform/ARM/N1Sdp/N1SdpPlatform.dec | 98
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 33 +-
Platform/A
This patch introduces new PCDs required to enable
chip to chip interface and corresponding memory map is updated.
Signed-off-by: Chandni Cherukuri
Signed-off-by: Khasim Syed Mohammed
---
.../Library/PlatformLib/PlatformLib.inf | 28 +--
.../Library/PlatformLib/PlatformLibMem.c |
This patch enables ACPI tables and configuration manager for N1SDP
Signed-off-by: Sami Mujawar
Signed-off-by: Khasim Syed Mohammed
---
Platform/ARM/N1Sdp/Include/N1SdpAcpiHeader.h | 35
Platform/ARM/N1Sdp/N1SdpPlatform.dec | 1 +
Platform/ARM/N1Sdp/N1SdpPlatform.ds
This patch creates Dsdt.asl, SsdtPci.asl and SsdtRemotePci.asl files
to provide the platform specific APCI table entries.
Three PCI root ports are available on N1Sdp, PCI0 is the default root port
PCI1 is the CCIX root port and PCI2 is the Remote host root port.
The Remote host specific entries a
The dynamic tables framework utilizes the configuration manager
protocol to get the platform specific information required for
building the firmware tables.
The configuration manager is a platform specific component that
collates the platform hardware information and builds an abstract
platform co
Hi Sami,
On Fri, Nov 5, 2021 at 06:54 AM, Khasim Mohammed wrote:
>
> Hi Sami,
>
> On Fri, Nov 5, 2021 at 06:05 AM, Sami Mujawar wrote:
>
>> Hi Khasim,
>>
>> Please find my response inline marked [SAMI].
>>
>> Regards,
>>
>> Sami M
se patches and the merge request and merge the
patches to appropriate repository.
Thanks.
Regards,
Khasim
>
> Just a reminder for Sami about the _OSC method:
> https://edk2.groups.io/g/devel/message/82724
>
> Regards,
>
> Pierre
>
>
> On 10/26/21 18:39, Khas
The patch series enables CCIX port as PCIe root on N1SDP.
In order to achieve this:
- The PciExpressLib is updated to validate the PCIe addresses
and introducing corresponding PCD entries.
- A custom PCI Segment library is adapted from SynQuacerPciSegmentLib
and ported for N1Sdp.
- The root c
Update the PciExpressLib to enable CCIX port as PCIe root host by
validating the PCIe addresses and introducing corresponding PCD
entries.
Change-Id: I0d1167b86e53a3781f59c4d68a3b2e61add4317e
Signed-off-by: Deepak Pandey
Signed-off-by: Khasim Syed Mohammed
---
.../PciExpressLib.c
This patch enables CCIX root complex support by updating
the root complex node info in PciHostBridge library
and enabling PciSegment library for N1Sdp.
Change-Id: I0510b1023aec16365b614d4eaf81858851d9fa28
Signed-off-by: Khasim Syed Mohammed
---
.../ConfigurationManagerDxe.inf | 3
The BasePCISegment Library in MdePkg doesn't allow configuring
multiple segments required for PCIe and CCIX root port
enumeration. Therefore, a custom PCI Segment library is adapted
from SynQuacerPciSegmentLib and ported for N1Sdp.
Change-Id: I0a124b0ea2fb7a8ee652de2d66b977d848c509b4
Signed-off-by
Update the PciExpressLib to enable CCIX port as PCIe root host by
validating the PCIe addresses and introducing corresponding PCD
entries.
Change-Id: I0d1167b86e53a3781f59c4d68a3b2e61add4317e
Signed-off-by: Deepak Pandey
Signed-off-by: Khasim Syed Mohammed
---
.../PciExpressLib.c
This patch enables CCIX root complex support by updating
the root complex node info in PciHostBridge library
and enabling PciSegment library for N1Sdp.
Change-Id: I0510b1023aec16365b614d4eaf81858851d9fa28
Signed-off-by: Khasim Syed Mohammed
---
.../ConfigurationManagerDxe.inf | 3
The patch series enables CCIX port as PCIe root on N1SDP.
V2:
- Removed few PCDs entries that were not used.
- Migrated to latest version edk2-platform and validated the patches.
V1:
- The PciExpressLib is updated to validate the PCIe addresses
and introducing corresponding PCD entries.
- A cu
The BasePCISegment Library in MdePkg doesn't allow configuring
multiple segments required for PCIe and CCIX root port
enumeration. Therefore, a custom PCI Segment library is adapted
from SynQuacerPciSegmentLib and ported for N1Sdp.
Change-Id: I0a124b0ea2fb7a8ee652de2d66b977d848c509b4
Signed-off-by
The patch series enables CCIX port as PCIe root on N1SDP.
V3:
- The conditional logic in GetPciExpressAddress is made simple.
- Removed few more PCD entries that were unused.
- Removed hardcoded entries.
V2:
- Removed few PCDs entries that were not used.
- Migrated to latest version edk2-platform
Update the PciExpressLib to enable CCIX port as PCIe root host by
validating the PCIe addresses and introducing corresponding PCD
entries.
Change-Id: I0d1167b86e53a3781f59c4d68a3b2e61add4317e
Signed-off-by: Deepak Pandey
Signed-off-by: Khasim Syed Mohammed
---
.../PciExpressLib.c
The BasePCISegment Library in MdePkg doesn't allow configuring
multiple segments required for PCIe and CCIX root port
enumeration. Therefore, a custom PCI Segment library is adapted
from SynQuacerPciSegmentLib and ported for N1Sdp.
Change-Id: I0a124b0ea2fb7a8ee652de2d66b977d848c509b4
Signed-off-by
This patch enables CCIX root complex support by updating
the root complex node info in PciHostBridge library
and enabling PciSegment library for N1Sdp.
Change-Id: I0510b1023aec16365b614d4eaf81858851d9fa28
Signed-off-by: Khasim Syed Mohammed
---
.../ConfigurationManager.c| 6
On Tue, Nov 30, 2021 at 09:06 AM, PierreGondois wrote:
Hi Pierre,
>
> Hi Khasim,
>
> On 11/23/21 1:26 PM, Khasim Mohammed via groups.io wrote:
>
>> This patch enables CCIX root complex support by updating
>> the root complex node info in PciHostBridge library
>>
> I still made some comments inline in this patch.
>
> Regards,
>
> Pierre
>
>
> On 11/23/21 1:26 PM, Khasim Mohammed via groups.io wrote:
>
>> Update the PciExpressLib to enable CCIX port as PCIe root host by
>> validating the PCIe addresses and introduci
Hi Sami, Chandni,
There was a suggestion from Pierre on a similar patch for N1SDP to remove
PCIExpressLib.c and move to workarounds to PCISegmentLib.c,
https://edk2.groups.io/g/devel/message/84165?p=%2C%2C%2C20%2C0%2C0%2C0%3A%3Arecentpostdate%2Fsticky%2C%2Ckhasim%2C20%2C2%2C0%2C87257273
I think
Hi Chandni,
One input,
On Sat, Dec 4, 2021 at 04:31 AM, chandni cherukuri wrote:
>
> This patch implements the configuration manager for Morello
> SoC platform. It enables support for generating the following
> ACPI tables for Morello SoC Platform:
> 1. FADT
> 2. DSDT
> 3. GTDT
> 4. MADT
> 5. S
Apologies for the delayed response, I was unable to work on the review comments
provided earlier. I will ensure the response is quick this time.
I have incorporated all the review comments and suggestions,
This patch series implements the configuration manager for N1Sdp
platform. It enables suppo
This patch introduces new PCDs required to enable
chip to chip interface and corresponding memory map is updated.
Signed-off-by: Chandni Cherukuri
Signed-off-by: Khasim Syed Mohammed
---
.../Library/PlatformLib/PlatformLib.inf | 28 +--
.../Library/PlatformLib/PlatformLibMem.c |
Add an initial platform DXE driver and support for ramdisk devices.
Signed-off-by: Deepak Pandey
Signed-off-by: Khasim Syed Mohammed
---
.../N1Sdp/Drivers/PlatformDxe/PlatformDxe.c | 51 +++
.../N1Sdp/Drivers/PlatformDxe/PlatformDxe.inf | 44
2 files changed,
This patch enables ACPI tables and configuration manager for N1SDP
Signed-off-by: Sami Mujawar
Signed-off-by: Khasim Syed Mohammed
---
Platform/ARM/N1Sdp/Include/N1SdpAcpiHeader.h | 35
Platform/ARM/N1Sdp/N1SdpPlatform.dec | 1 +
Platform/ARM/N1Sdp/N1SdpPlatform.ds
This patch adds PCDs and updates the fdf file for N1Sdp
platform specific configurations.
Signed-off-by: Deepak Pandey
Signed-off-by: Khasim Syed Mohammed
---
Platform/ARM/N1Sdp/N1SdpPlatform.dec | 98
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 28 +++-
Platform/ARM
This patch creates Dsdt.asl, SsdtPci.asl and SsdtRemotePci.asl files
to provide the platform specific APCI table entries.
Three PCI root ports are available on N1Sdp, PCI0 is the default root port
PCI1 is the CCIX root port and PCI2 is the Remote host root port.
The Remote host specific entries a
The dynamic tables framework utilizes the configuration manager
protocol to get the platform specific information required for
building the firmware tables.
The configuration manager is a platform specific component that
collates the platform hardware information and builds an abstract
platform co
This patch adds missing documentation for few of the functions
and fixes few formatting changes.
Signed-off-by: Khasim Syed Mohammed
---
.../PciHostBridgeLib/PciHostBridgeLib.c | 18
.../Library/PlatformLib/PlatformLib.c | 43 ---
2 files changed, 47 insert
his patch, it looks good to
> me.
I am able to run these tests, it throws few errors for variable names, doxygen
style, duplicate GUIDs and coding styles. I will fixes these along with inputs
on other patches and post new version this week.
Thanks for the support.
>
> Regards,
>
The patch series removes PciExpressLib and enables CCIX port
as PCIe root on N1SDP.
V4:
- Remove PciExpressLib and use PciSegmentLib instead. More detailed explanation
is included in the patch.
V3:
- The conditional logic in GetPciExpressAddress is made simple.
- Removed few more PCD entries th
The BasePCISegment Library in MdePkg doesn't allow configuring
multiple segments required for PCIe and CCIX root port
enumeration. Therefore, a custom PCI Segment library is adapted
from SynQuacerPciSegmentLib and ported for N1Sdp.
In addition to this, the hardware has few other limitations which
This patch enables CCIX root complex support by updating
the root complex node info in PciHostBridge library.
The corresponding PCDs are updated.
Change-Id: I0510b1023aec16365b614d4eaf81858851d9fa28
Signed-off-by: Khasim Syed Mohammed
---
.../ConfigurationManager.c| 6 +-
..
The patch removes PciExpressLib implementation for N1Sdp as:
a) The PciSegmentLib implementation for N1Sdp makes MmioRead() calls
instead of PciRead() which makes the PciExpressLib redundant.
b) Since N1Sdp requires multiple segments to be supported, PciExpressLib
and PciLib cannot
The patch series removes PciExpressLib and enables CCIX port
as PCIe root on N1SDP.
V5:
- Split the CCIX patch, separate PCD updates and CCIX root port enablement.
- Use GET_SEG_ macro for segment detection and update logic accordingly.
V4:
- Remove PciExpressLib and use PciSegmentLib instead. Mo
The BasePCISegment Library in MdePkg doesn't allow configuring
multiple segments required for PCIe and CCIX root port
enumeration. Therefore, a custom PCI Segment library is adapted
from SynQuacerPciSegmentLib and ported for N1Sdp.
In addition to this, the hardware has few other limitations which
PCD entries are updated to remove the hardcoded assignments and to
add support for multiple PCI root ports.
Signed-off-by: Khasim Syed Mohammed
---
.../AslTables/SsdtPci.asl | 8 +--
.../AslTables/SsdtRemotePci.asl | 4 +-
.../ConfigurationManager.c
This patch enables CCIX root complex support by updating
the root complex node info in PciHostBridge library.
Signed-off-by: Khasim Syed Mohammed
---
.../PciHostBridgeLib/PciHostBridgeLib.c | 71 +--
.../PciHostBridgeLib/PciHostBridgeLib.inf | 11 ++-
2 files changed, 7
The patch removes PciExpressLib implementation for N1Sdp as:
a) The PciSegmentLib implementation for N1Sdp makes MmioRead() calls
instead of PciRead() which makes the PciExpressLib redundant.
b) Since N1Sdp requires multiple segments to be supported, PciExpressLib
and PciLib cannot
The patch series removes PciExpressLib and enables CCIX port
as PCIe root on N1SDP.
V6:
- Sort PCDs in alphabetical order
- Replace ASSERT calls with a if condition to capture the failure
V5:
- Split the CCIX patch, separate PCD updates and CCIX root port enablement.
- Use GET_SEG_ macro for segm
The BasePCISegment Library in MdePkg doesn't allow configuring
multiple segments required for PCIe and CCIX root port
enumeration. Therefore, a custom PCI Segment library is adapted
from SynQuacerPciSegmentLib and ported for N1Sdp.
In addition to this, the hardware has few other limitations which
PCD entries are updated to remove the hardcoded assignments and to
add support for multiple PCI root ports.
Signed-off-by: Khasim Syed Mohammed
---
.../AslTables/SsdtPci.asl | 8 +--
.../AslTables/SsdtRemotePci.asl | 4 +-
.../ConfigurationManager.c
This patch enables CCIX root complex support by updating
the root complex node info in PciHostBridge library.
Signed-off-by: Khasim Syed Mohammed
---
.../PciHostBridgeLib/PciHostBridgeLib.c | 71 +--
.../PciHostBridgeLib/PciHostBridgeLib.inf | 11 ++-
2 files changed, 7
The patch removes PciExpressLib implementation for N1Sdp as:
a) The PciSegmentLib implementation for N1Sdp makes MmioRead() calls
instead of PciRead() which makes the PciExpressLib redundant.
b) Since N1Sdp requires multiple segments to be supported, PciExpressLib
and PciLib cannot
The patch series removes PciExpressLib and enables CCIX port
as PCIe root on N1SDP.
V7:
- Spit the patches to separate Platform and Silicon specific files
V6:
- Sort PCDs in alphabetical order
- Replace ASSERT calls with a if condition to capture the failure
V5:
- Split the CCIX patch, separate
PCD entries are updated to remove the hardcoded assignments and to
add support for multiple PCI root ports.
Signed-off-by: Khasim Syed Mohammed
---
.../Library/PlatformLib/PlatformLib.inf | 1 +
.../Library/PlatformLib/PlatformLibMem.c | 4 +-
Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc
The BasePCISegment Library in MdePkg doesn't allow configuring
multiple segments required for PCIe and CCIX root port
enumeration. Therefore, a custom PCI Segment library is adapted
from SynQuacerPciSegmentLib and ported for N1Sdp.
In addition to this, the hardware has few other limitations which
PCD entries are updated to add support for multiple PCI root ports.
Signed-off-by: Khasim Syed Mohammed
---
.../AslTables/SsdtPci.asl | 8 +++
.../AslTables/SsdtRemotePci.asl | 4 ++--
.../ConfigurationManager.c| 24 +--
This patch enables CCIX root complex support by updating
the root complex node info in PciHostBridge library.
Signed-off-by: Khasim Syed Mohammed
---
.../PciHostBridgeLib/PciHostBridgeLib.c | 71 +--
.../PciHostBridgeLib/PciHostBridgeLib.inf | 11 ++-
2 files changed, 7
The patch removes PciExpressLib implementation for N1Sdp as:
a) The PciSegmentLib implementation for N1Sdp makes MmioRead() calls
instead of PciRead() which makes the PciExpressLib redundant.
b) Since N1Sdp requires multiple segments to be supported, PciExpressLib
and PciLib cannot
Update N1Sdp Platform dsc to use PciSegmentLib instead of PciExpressLib.
Signed-off-by: Khasim Syed Mohammed
---
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
b/Platform/ARM/N1Sdp/N1SdpPlatform.ds
From: Khasim Mohammed
This patch adds resource descriptor for multi-chip usecase and
introduces corresponding PCD definitions.
Signed-off-by: Chandni Cherukuri
Signed-off-by: Khasim Syed Mohammed
---
Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 30
++-
Silicon
From: Khasim Mohammed
Add an initial platform DXE driver and support for ramdisk devices.
Signed-off-by: Deepak Pandey
Signed-off-by: Khasim Syed Mohammed
---
Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.inf | 44 +
Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.c
From: Khasim Mohammed
This patch updates the fdf file and introduces component
description and configuration files for N1Sdp.
Signed-off-by: Deepak Pandey
Signed-off-by: Khasim Syed Mohammed
---
Platform/ARM/N1Sdp/N1SdpPlatform.dec | 90
Platform/ARM/N1Sdp
From: Khasim Mohammed
The dynamic tables framework utilizes the configuration manager
protocol to get the platform specific information required for
building the firmware tables.
The configuration manager is a platform specific component that
collates the platform hardware information and
Resending the patches again as the previous two sets didn't make it to the
mailing list.
This patch series implements the configuration manager for N1Sdp
platform. It enables support for generating the following
ACPI tables:
1. FACP
2. DSDT
3. GTDT
Add an initial platform DXE driver and support for ramdisk devices.
Signed-off-by: Deepak Pandey
Signed-off-by: Khasim Syed Mohammed
---
Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.inf | 44 +
Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.c | 51
++
This patch updates the fdf file and introduces component
description and configuration files for N1Sdp.
Signed-off-by: Deepak Pandey
Signed-off-by: Khasim Syed Mohammed
---
Platform/ARM/N1Sdp/N1SdpPlatform.dec | 90
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 28 +-
Platform
Resending the patches again as the previous two sets didn't make it to the
mailing list.
This patch series implements the configuration manager for N1Sdp
platform. It enables support for generating the following
ACPI tables:
1. FACP
2. DSDT
3. GTDT
Add an initial platform DXE driver and support for ramdisk devices.
Signed-off-by: Deepak Pandey
Signed-off-by: Khasim Syed Mohammed
---
Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.inf | 44 +
Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.c | 51
++
This patch updates the fdf file and introduces component
description and configuration files for N1Sdp.
Signed-off-by: Deepak Pandey
Signed-off-by: Khasim Syed Mohammed
---
Platform/ARM/N1Sdp/N1SdpPlatform.dec | 90
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 28 +-
Platform
This patch adds resource descriptor for multi-chip usecase and
introduces corresponding PCD definitions.
Signed-off-by: Chandni Cherukuri
Signed-off-by: Khasim Syed Mohammed
---
Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 30
++-
Silicon/ARM/NeoverseN1Soc/Librar
The dynamic tables framework utilizes the configuration manager
protocol to get the platform specific information required for
building the firmware tables.
The configuration manager is a platform specific component that
collates the platform hardware information and builds an abstract
platform co
The dynamic tables framework utilizes the configuration manager
protocol to get the platform specific information required for
building the firmware tables.
The configuration manager is a platform specific component that
collates the platform hardware information and builds an abstract
platform co
From: Khasim Mohammed
Resending the patches as the previous try didn't make it mailing list.
This patch series implements the configuration manager for N1Sdp
platform. It enables support for generating the following
ACPI tables:
1. FACP
2. DSDT
3.
This patch adds resource descriptor for multi-chip usecase and
introduces corresponding PCD definitions.
Signed-off-by: Chandni Cherukuri
Signed-off-by: Khasim Syed Mohammed
---
Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 30
++-
Silicon/ARM/NeoverseN1Soc/Librar
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