The EIOR register of the Gic CPU interface is a 32 bit register.
However, the HARDWARE_INTERRUPT_SOURCE used to represent the
interrupt source (Interrupt ID) is typedefed as UINTN, see
EmbeddedPkg\Include\Protocol\HardwareInterrupt.h
Therfore, typecast the interrupt ID (Source) value to UINT32
before setting the EOIR register. Also, add an assert to check
that the value does not exceed 32 bits.
Signed-off-by: Sami Mujawar <sami.muja...@arm.com>
---
Notes:
v2:
- Assert condition should be <= [Ard]
- Fixed assert condition as per feedback and [Sami]
also updated copyright year.
- Ref: https://edk2.groups.io/g/devel/message/105187
ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c
b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c
index
f403bec367b5254c248e620e56471904e520f9f2..d21caa90e5def04ff9666939c879de4aa772f97e
100644
--- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c
+++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c
@@ -1,12 +1,13 @@
/** @file
*
-* Copyright (c) 2013-2014, ARM Limited. All rights reserved.
+* Copyright (c) 2013-2023, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#include <Library/ArmGicLib.h>
+#include <Library/DebugLib.h>
#include <Library/IoLib.h>
UINTN
@@ -26,5 +27,6 @@ ArmGicV2EndOfInterrupt (
IN UINTN Source
)
{
- MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Source);
+ ASSERT (Source <= MAX_UINT32);
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, (UINT32)Source);
}
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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